And/Or And Test False - IBM 5410 Maintenance Manual

Processing unit
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The output from the ALU is sent to main storage, local
storage registers, operation register, Q register, condition
register, and data bus out. The use of this output is covered
under the individual operations.
AND/OR and Test False
Figure 2-24 illustrates the AND/OR and test false functions
for a single bit position. Outputs from the test false lines
are used to set the CR test false latch. These outputs depend
A
Register Bit
7
B Register Bit
7
Figure 2-24. Single Bit AND/OR
B
Register
A
Register
(No controls)
B
Register
A
,
Register
OR
Figure 2-25. ALU-AND/OR Functions
Output is
same as
B register
Bit in either
register for
output.
OR
B
upon the presence or absence of bits in the A and B
registers and the active control line (AND or OR). Test
false outputs are covered under the operations that use them.
The AND function is a bit-by-bit comparison of the two
registers and requires the same bit in each register to have
that bit out. The OR function gives an output for any bit
which is present in either register. Figure 2-25 contains the
outputs available through the use of the AND and OR con-
trol lines.
A
OR
A
Test False
ALU
Bit 7
Latch
FL
Register
A
Need same bit
in both registers
for output.
Register
AND
AND
Output is
same as
A
register.
5410 TO
2-25
E

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