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Most addresses given in the instructions are for the location
of the low order or right hand digit of the field. Therefore,
as the instruction is executed and as each digit position is
processed, the BAR and AAR are decremented to address
core in descending order.
An
exception is the insert and
test character operation which is executed from high order
to low order digits. In this case the BAR is incremented in
the same manner the IAR is incremented during instruction
cycles.
Indexing
• Two byte index register is added to one byte from
instruction to create new address.
Indexing provides the programmer with a means of changing
addresses within a program without changing the instruction.
An
indexed address consists of a single byte within the
instruction. This single byte is added to the contents of a
two byte index register to form a new address. The indexed
address is then loaded into the BAR or AAR depending upon
the address being indexed.
Indexing is used in; (1) performing an instruction with an
indexed address, (2) adding a constant to the index register,
and (3) branching to an address to perform the instruction at
a different core storage location. Thus it is possible to per-
form an instruction or series of instructions many times
without wasting main storage by repeating the instruction.
Either of two index registers (XR-1 or XR-2) can be selected
for indexing. The recognition of indexed addresses and the
selection of each index register is covered under 'Instruction
Formats.'
1-12
Instruction Formats
'
Instruction length is three to six bytes.
• Bits 0-3 of op code determine type of instruction and
addressing.
The CPU performs three types of instructions. They are:
• two address instructions
• one address instructions
• command instructions
Two address instructions are those instructions which in-
volve two separate fields within main storage and therefore
contain two addresses. Most one address instructions in-
volve only one field within main storage and therefore
contain one address (the load address instruction contains
the needed data rather than an address). Command in-
structions are those instructions which do not involve main
storage at all and therefore contain no addresses.
Each instruction consists of an operation code and a
Q
code
(Figure 1-9). These are followed by either a control code,
or one or two addresses. Thus, the length of the instruction
varies from three to six bytes depending upon the type of
instruction and the type of addressing.
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