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3.
Place the value 4/0 irito the data byte location as an
indication that the character has been printed.
In the first print cycle steal, the LPDAR (line printer data
address register) addresses storage. The byte of data is added
to zeros in the A register to move the byte through the ALU
and is sent to the printer attachment where it is retained.
In the second cycle, the LPIAR (line printer image address
register) addresses storage and the chain image character
is read out and placed in the B register. The byte of data
1/0
Block SOR (From device)
transferred to the attachment during cycle I is sent back
to the CPU from the printer attachment and enters the A
register from DBI. The printer attachment activates the
'chan in bin sub' line to subtract the A register from the
B register. The result is sent to the printer attachment.
If
the result is zero, the two characters are the same and the
printer prints the character.
In the third print cycle, the LPDAR again addresses storage
and the printer attachment activates the 'I/O block SDR'
line to prevent the character from entering the B register.
<
Gate
1/0
Bus to A
(Active for entire
Clocks
1, 3, 5, 7
aocks 0, 2, 4, 6
S
Main
S
B
Registe
A
Storage
D
A
A .... - •
Store New
(Activated by device)
Figure 3-60 (Part 1 of 2).
1/0
Cycle Data Transfer
3-40
LSR
1/0
cycle)
------
r--;======::---::::=::::::~-
A
Register
Binary Complement
A Register
Hex
to
Card
Code
Trans-
lator
Card
Code
DBI
Attach·
to
Buffer
ment
Hex
Trans-
lator
Channel In Translate In
~
. . . _ _ _ _ _ _ - - - - t
(From device)
Channel In Binary Subtract
'L_
(From device)
\
DBO
Channel In Translate Out
(From device)
Hi
Lo
LSR Select (Device Address Register)
LSR
Select
Tri
ers
Oocks 8, 0, 2, 4
FF
LSA
A
Select
FF
Decode
LSR Select Lines
~
From Attachments
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