Preface - Analog Devices Lite ADSP-21371 EZ-KIT System Manual

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PREFACE

Thank you for purchasing the ADSP-21371 EZ-KIT Lite
Devices, Inc. evaluation system for SHARC
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated I/O processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represents today's de facto standard for
floating-point processing, targeted toward premium audio applications.
The evaluation system is designed to be used in conjunction with the
®
CrossCore Embedded Studio (CCES) and VisualDSP++
environments to test capabilities of the ADSP-21371 SHARC processors.
The development environment aids advanced application code develop-
ment and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21371 assembly
• Load, run, step, halt, and set breakpoints in application program
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21371 processor from a personal computer (PC) is
achieved through a USB port or an external JTAG emulator. The USB
interface provides unrestricted access to the ADSP-21371 processor and
ADSP-21371 EZ-KIT Lite Evaluation System Manual
®
, Analog
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processors.
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development
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