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CLIP Signal Name
LVDS_PFI_Output_Ena
ble
LVDS_PFI_Rd
LVDS_PFI_Wr
LVDS_Data_Wr
LVDS_Data_Rd
Clk Out Inversion DO13
(HIHO)
Clk Out Inversion DO29
(All Out)
Direction
To CLIP
From CLIP
To CLIP
To CLIP
From CLIP
To CLIP
To CLIP
PXIe-6569 Getting Started Guide
Data Type
Boolean
Boolean
Boolean
U32 (HIHO);
U64 (All Out)
U32 (HIHO); U64 (All In)
Boolean
Boolean
Description
write to the SE
data line.
0—Use
■
SE_Data_Rd to
read the SE data
line value.
Provides read/write
access to all low-
voltage differential
signal (LVDS) PFI
channels.
LVDS_PFI_Output_Ena
ble values:
1—Use
■
LVDS_PFI_Wr to
write to the PFI
data line.
0—Use
■
LVDS_PFI_Rd to
read the PFI data
line value.
Provides read/write
access to all LVDS
channels. The least
significant bit (LSB) of
the U32 (HIHO)/U64
(All In and All Out)
corresponds to DIO 0.
Inverts the generated
clock by applying a
180-degree phase shift
to the clock signal.
The generated clocks
are output on DO 13
(HIHO) or on DO 29 (All
Out).
© National Instruments
25
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