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Model 5950-SID VITC Reader / Source ID Decoder Manual
4.3.4. Character Generator Sync Separator and Keyer (5200-36)
The Character inserter composite video is taken from the Reader Video
input loop and is buffered by Q2 and distributed to the character generator
sync separator and keyer/ amplifier. The sync separator U54 provides H
Sync, V Sync, a Frame pulse (active high for field 1) and a back porch
clamp pulse to drive the DC restorer circuitry U55 and associated
components.
The Video keyer U40 is controlled by the VCGKEY signal generated in the
LCA U36. VCGKEY switches U40 between the program video path and
the VCGWHITE data. When the VCGKEY signal is LOW the active video
is passed through the keyer.
When the VCGKEY signal is HIGH the
VCGWHITE data is added to the black level of the video.
To calibrate the video keyer, connect colour bars from your sync generator
to the Reader Video input loop of the model 5950-SID and to channel A of
your oscilloscope and terminate it. Connect one of the video outputs of the
model 5950-SID to channel B of your scope and terminate it. Adjust the
GAIN trimpot (VR3) so that the output amplitude matches the input. Adjust
the CHAR LEVEL trimpot (VR2) so that the inserted characters are
approximately at the peak white video level.
4.3.5. Character Generator Logic (5200-37)
The majority of the logic for the character generator functions is contained
in a programmable logic device (LCA) U36. Its program is loaded from
EPROM U35 on power up. The character display is formatted to display 28
(32 for PAL) rows of 32 characters each in the tiny size, 14 (16 for PAL)
rows the small size, and 7 (8 for PAL) rows in the large size. Each of the
character positions corresponds to one location in static RAM 37. The
MCU writes characters into specified locations in the RAM corresponding
to the position of the characters on the screen. RAM locations are scanned
during each television field.
Valid characters address corresponding
sections of the character EPROM U35 and are loaded into the LCA one
byte (8 bits) at a time. Each byte corresponds to either the left or right half
of a character pixel line. The internal logic in the LCA controls how many
lines per character and how many character lines there are on the raster
according to registers set by the firmware.
The character data is clocked out of the LCA on the VCGWHITE output
(U36 pin 73). A special character with all bits set to 1 is written into all
positions of the RAM where no characters are to be displayed. These
characters disable the keyer by the VCGKEY signal generated in the LCA
(U36 pin 79). When other characters are present the VCGKEY signal
becomes active, allowing the characters to be keyed into the video signal.
The character data is clocked out of the LCA with the dot clock, so that the
pixel width is not dependent on propagation delays in the LCA. The pixels
are presented to the video keyer U40 through CHAR LEVEL trimpot VR2.
A control register in the LCA selects whether the characters will be white or
black and whether they will be keyed into a contrasting background.
TECHNICAL DESCRIPTION
Page 4-8
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