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4.3.
CIRCUIT DESCRIPTION
TECHNICAL DESCRIPTION
Model 5950-SID VITC Reader / Source ID Decoder Manual
JP23
MCU TX
JP24
VCG Video In
The model 5950-SID reader is a microcontroller based device functionally
divided into the following hardware subsystems:
1
Microcontroller & I/O
2
Display and Pushbuttons
3
High speed VITC Reader
4
Character generator video keyer
5
Character generator logic
The microcontroller, LTC and VITC readers, LTC translator, character
generator logic and video processing circuits are all contained on the main
circuit card (5200). The display and keypad circuitry is contained on a
separate circuit board (5220) which plugs into the main board via a twenty
conductor ribbon cable. The relevant schematic drawings are shown in
brackets for each section of the circuit. The heart of the model 5950-SID
circuitry are two programmable logic array (LCA) devices. One LCA (U25)
contains most of the VITC reader logic and the support circuitry for
addressing various devices on the board. The other LCA (U36) contains
the character generator raster scanning logic.
4.3.1. Microcontroller (5200-33)
At the heart of the model 5950-SID reader is an 8032 microcontroller,
(MCU) U17.
Its three 8 bit bi-directional ports and 8 bit bus provide
peripheral interfacing to the rest of the circuits.
contained on EPROM U19.
internally by the MCU. An onboard oscillator, also part of the MCU, is
crystal controlled. Its' 15.36 MHz frequency is internally divided by 12,
resulting in a processor operating frequency of 1.28 MHz.
Not installed for 5950
A
VITC Reader Video connected to RDR IN
Loop. VCG video connected to Gen Video In
loop.
B
VITC Reader and VCG Video connected to
either RDR IN Loop or Gen Video In loop as
selected by U38.
A & B
VITC Reader Video and VCG video connected
to RDR IN Loop. U38 not installed.
Scratch pad and data RAM are provided
Program memory is
Page 4-5
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