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VCG
OUT
A
B
CHAR GEN
KEYER
CHAR GEN
LOGIC LCA
CHAR
PIXEL
OSC
TECHNICAL DESCRIPTION
Model 5950-SID VITC Reader / Source ID Decoder Manual
VIDEO
REMOTE
IN
CONTROL
+VIDEO
PARALLEL
SYNC SEP
INPUTS
VITC RDR
SLICER
READER
LCA
DISPLAY
Figure 4-3: Block Diagram
4.3.2. Front Panel Display and Pushbuttons (5220-31)
A 12 digit alphanumeric display, and a 10 button keypad are contained on
a separate circuit card (5220) which is connected to the main circuit board
via a 20 conductor ribbon cable.
The 12 digit display is self scanning and contains its own character display
memory. Data is written to the displays once per frame. Address Latch U1
generates chip enable and address information to the display devices to
allow the MCU to write data to the display and control registers.
The status LED's are controlled by interface driver U3.
accessed with a serial clock and data stream once per frame. When all the
LED information has been shifted into the driver, it is latched there by the
LEDSTB signal from the MCU (display header pin 10).
VITC
BIT RATE
PLL
UP
MAINS IN
+5V
SWITCHING
+8V
POWER
SUPPLY
-8V
This driver is
Page 4-6
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