Supermicro SuperStorage 2029P-DN2R24L User Manual page 77

SuperStorage Server 2029P-DN2R24L User's Manual
Memory RAS (Reliability_Availability_Serviceability) Configuration
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Use this submenu to configure the following Memory RAS settings.
Static Virtual Lockstep Mode
Select Enable to support the Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.
Mirror Mode
Use this feature to configure the mirror mode settings for all 1LM/2LM memory modules
installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are
Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
UEFI ARM Mirror
If this feature is set to Enable, mirror mode configuration settings for UEFI-based Address
Range memory will be activated upon system boot. This will create a duplicate copy of data
stored in the memory to increase memory security, but it will reduce the memory capacity
into half. The options are Disable and Enable.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.
Note: This item will not be available when memory mirror mode is enabled.
Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.
Intel Run Sure (Available when this feature is supported by the CPU)
Select Enable to support Intel® Run Sure Technology to further enhance critical data
protection and to increase system uptime and resiliency. The options are Enable and
Disable.
SDDC Plus One (Available when this feature is supported by the CPU & the item:
Intel Run Sure is set to Disable)
SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-bit
max.) memory faults that affect an entire single x4 DRAM device. SDDC Plus One is the
enhanced feature to SDDC. SDDC+1 will spare the faulty DRAM device out after an SDDC
event has occurred. After the event, the SDDC+1 ECC mode is activated to protect against
any additional memory failure caused by a 'single-bit' error in the same memory rank. The
options are Disable and Enable*. (The option "Enable" can be set as default when it is
supported by the motherboard.)
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