Table 22. Spi Differences Between Stm32L1 Series And Stm32L4 Series - ST STM32L1 Series Application Note

AN4612
4.14 SPI
The STM32L4 and STM32L1 Series implement almost the same features on the SPI (apart
from I2S).
The table below shows the differences.

Table 22. SPI differences between STM32L1 Series and STM32L4 Series

SPI
Instances x3 (SPI1, SPI2, SPI3)
Features SPI + I2S
Data size Fixed, configurable to 8 or 16 bits
Tx & Rx 16-bit buffers
Data buffer
(single data frame)
No
Data packing
(16-bit access only)
SPI TI mode
Mode
SPI Motorola mode
Speed 16 MHz (core at 32 MHz)
Configuration
Color key:
= New feature or new architecture (difference between STM32L1 and STM32L4 Series)
= Same feature, but specification change or enhancement
= Difference between STM32L1 and STM32L4 Series highlight
STM32L1 Series
-
DocID027094 Rev 3
Peripheral migration
STM32L4 Series
x3 (SPI1, SPI2, SPI3)
I2S feature is not supported by SPI in
STM32L4 Series, 2 SAI interfaces are
available instead.
Programmable from 4 to 16-bit
32-bit Tx & Rx FIFOs
(up to 4 data frames)
Yes
(8-bit, 16-bit or 32-bit data access,
programmable FIFOs data thresholds).
SPI TI
SPI Motorola mode
NSSP mode
40 MHz (core at 80Mhz)
The data size and Tx/Rx flow handling are
different in STM32L1 and STM32L4 Series
hence requiring different SW sequences.
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