ST STM32L1 Series Application Note page 23

AN4612
The STM32L4 Series features an additional SRAM (SRAM2) of 32 Kbyte on Cat. 2 devices
and 16 Kbyte on Cat. 4 devices. The SRAM2 includes additional features listed below:
•
Maximum performance through ICode bus access without physical remap
•
Parity check option (32-bit + 4-bit parity check)
•
Write protection with 1 Kbyte granularity
•
Read Protection (RDP)
•
Erase by system reset (option byte) or by software
•
Content is preserved in Low-power run, Low-power sleep, Stop 0, Stop 1, Stop 2 mode
•
Content can be preserved (RRS bit set in PWR_CR3 register) in Standby mode
(not the case for SRAM1).
DocID027094 Rev 3
Peripheral migration
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