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C.8.4 ISPI Status Register
The ISPI status register (SPSR) contains flags indicating whether an overrun condi-
tion has occurred, an interrupt has been requested, and whether a transfer is being
performed.
SPSR — ISPI Status Register
15
14
13
12
R
0
OVR
IRQ
XCH
W
RESET:
0
0
0
0
OVR — Overrun
This register bit is set by the ISPI controller when a new value is loaded into the RX
while the RX is holding previously received data which has not been read. This
occurs when SPI_EN becomes inactive and the bit timer has already timed out or
when the bit counter times out a second time while SPI_EN remains asserted. It
could also be set in interval or manual master mode if the RX data register is not read
between transfers. In these cases, the OVR bit may be ignored if appropriate.
0 = No overrun event has occurred
1 = An overrun event has occurred
This bit is cleared by writing it to a one or by reset.
IRQ — Interrupt Request
This register bit is cleared on either a write or a read of the ISPI data register, and
when set indicates that an interrupt has been requested.
0 = No interrupt has been requested
1 = An interrupt has been requested
XCH — Exchange
This bit reads the value of XCH, which indicates when the state machine is perform-
ing a transfer. In manual mode, XCH is set by writing the ISPI data register. In interval
mode, XCH is set automatically by the interval timer. In slave mode, XCH is set when
pin SPI_EN is asserted and is negated briefly once the counters determine the com-
pletion of a transfer. It is then reasserted if SPI_EN is still asserted. In all modes, XCH
is reset upon completion of a transfer.
0 = SPI is idle or interval timer is operating
1 = Initiate exchange or exchange in progress
C.9 UART Programming Model
All UART registers may be accessed either as a halfword or as a byte. The RX and
TX data registers may also be accessed as 32-bit words. For these registers the
upper 16 bits are forced to zeros.
MOTOROLA
C-34
All manuals and user guides at all-guides.com
Freescale Semiconductor, Inc.
11
10
9
8
0
0
0
0
0
0
0
0
Figure C-35 ISPI Status Register
PROGRAMMING REFERENCE
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Go to: www.freescale.com
7
6
5
4
0
0
0
0
0
0
0
0
10008006
3
2
1
0
0
0
0
0
0
0
0
0
MMC2001
REFERENCE MANUAL
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