Eim Functionality; Configurable Bus Sizing; Eim Interface To Memory And Peripherals - Motorola Freescale Semiconductor M-Core MMC2001 Reference Manual

EIM
Figure 7-2 EIM Interface to Memory and Peripherals

7.5 EIM Functionality

7.5.1 Configurable Bus Sizing

The EIM supports byte, halfword, and word operands, allowing access to 8- and 16-
bit ports. It does not support misaligned transfers.
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ADDR[19:0]
CS2
OE
DATA[15:0]
EB1
EB0
R/W
CS0
CS3
CS1
EXTERNAL INTERFACE MODULE
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ADDR[16:0]
ADDR[16:0]
CS
RAM
EB1
WE
128K X 8
OE
DATA[7:0]
DATA[7:0]
ADDR[16:1]
ADDR[15:0]
EB1
LB
EB0
UB
64K X 16
CS
R/W
WE
OE
OE
DATA[15:0]
ADDR[19:1]
ADDR[15:0]
Flash
CS
512K X 16
R/W
WE
OE
OE
DATA[15:0]
ADDR0
RS
E
Control
R/W
R/W
DATA[7:0]
RAM
LCD
MMC2001
REFERENCE MANUAL