Limitations; Operational Amplifier And Comparator; Operational Amplifier; Table 26. Setting Of Jumpers Related To Potentiometer And Ldr - ST STM32L476ZG User Manual

UM1855
Table 25. Port assignment for control of physical input devices (continued)
Resistive touch screen Y-
The potentiometer and the light-dependent resistor can be routed, mutually exclusively, to
either PB4 or to the PA0 port of STM32L476ZG.
configuration jumpers.
As illustrated in the schematic diagram, the PB4 port is routed, in the STM32L476ZG, to the
noninverting input of comparator Comp2. The PA0 is routed to the noninverting input of the
operational amplifier OpAmp1. However, depending on register settings, it can also be
routed to ADC1 or ADC2.
Jumper
JP5
JP7
JP5
JP7
JP5
JP7
JP5
JP7
6.18.1

Limitations

The potentiometer and the light-dependent resistor are mutually exclusive.
6.19

Operational amplifier and comparator

6.19.1

Operational amplifier

STM32L476ZG provides two onboard operational amplifiers, one of which, OpAmp1, is
made accessible on STM32L476G-EVAL. OpAmp1 has its inputs and its output routed to
I/O ports PA0, PA1, and PA3, respectively. The noninverting input PA0 is accessible on
terminal 1 of the JP7 jumper header. On top of the possibility of routing either of the
Input device
Potentiometer
LDR

Table 26. Setting of jumpers related to potentiometer and LDR

Setting
JP5 JP7
JP5 JP7
JP5 JP7
JP5 JP7
Control port
Y-
PB4 or PA0
PA0 or PB4
Table 26
Potentiometer is routed to pin PB4 of STM32L476ZG.
Default setting.
Potentiometer is routed to pin PA0 of STM32L476ZG.
LDR is routed to pin PB4 of STM32L476ZG.
LDR is routed to pin PA0 of STM32L476ZG.
UM1855 Rev 6
Hardware layout and configuration
Control device
IOExpander1
STM32L476ZG
STM32L476ZG
depicts the setting of associated
Routing
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