Table 4. Setting Of Configuration I/Os For Pe2, Pe3, Pe4, And Pe5 - ST STM32G474E-EVAL User Manual

UM2514
Element
R147
SB111
SB103
R145
SB110
SB118
R146
R144
SB107
SB109
R143

Table 4. Setting of configuration I/Os for PE2, PE3, PE4, and PE5

Setting
R147 in
SB111 OFF
SB103 OFF
R147 out
SB111 ON
SB103 OFF
R147 out
SB111 OFF
SB103 ON
R145 in
SB110 OFF
SB118 OFF
R146 out
R145 out
SB110 ON
SB118 OFF
R146 out
R145 out
SB110 OFF
SB118 ON
R146 out
R145 out
SB110 OFF
SB118 OFF
R146 in
R144 in
SB107 OFF
SB109 OFF
R143 out
R144 out
SB107 ON
SB109 OFF
R143 out
R144 out
SB107 OFF
SB109 ON
R143 out
R144 out
SB107 OFF
SB109 OFF
R143 in
Default setting.
PE2 connects to TRACECLK.
Default setting.
PE2 connects to SAI_MCLK_A.
PE2 connects to MC1|MC2_PFC_Sync.
Default setting.
PE3 connects to TRACED0.
Default setting.
PE3 connects to SAI_SD_B.
PE3 connects to MC1|MC2_PFC_pwm.
Default setting.
PE3 connects to memory address line A19.
Default setting.
PE4 connects to TRACED1.
Default setting.
PE4 connects to SAI_FS_A.
PE4 connects to MC1_ICL_SHUTOUT.
Default setting.
PE4 connects to memory address line A20.
UM2514 Rev 5
Hardware layout and configuration
Configuration
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