Transmission - Renesas M16C/26 Series Reference Book

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M16C/26 Group

1.6.2 Transmission

When an external clock is selected, the conditions must be met while if the UiC0 register's CKPOL bit =
"0" (transmit data output at the falling edge and the receive data taken in at the rising edge of the transfer
clock), the external clock is in the high state; if the UiC0 register's CKPOL bit = "1" (transmit data output at
the rising edge and the receive data taken in at the falling edge of the transfer clock), the external clock is
in the low state.
• The TE bit of UiC1 register= "1" (transmission enabled)
• The TI bit of UiC1 register = "0" (data present in UiTB register)
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• If CTS function is selected, input on the CTSi pin = "L"
Rev.0.90 2003.12.28 page 16 of 28
1.6 Precautions for Serial I/O (Clock-synchronous Serial I/O)
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