Analog Devices ADP1046A User Manual page 17

ADP1046A 100Watt
Evaluation board
B. Volt Second Balance feature: The CS1 settings window has the volt second feature that measures the average
current in each leg of the full bridge topology. The algorithm reduces (or increases) the conduction time of each
branch by varying the pulse width of the MOSFET gate signals applied to OUTB and OUTD depending if there was
an increase (or decrease) of current in the corresponding branch. A maximum of 80 or 160ns can be accounted for by
this algorithm.
This test was conducted by purposely introducing a mismatch of 75ns in the PWM settings window. This mismatch
clearly shows that the transformer is close to saturation on one end. Figure 25 shows the imbalance and Figure 26.
shows the corrected imbalance after the feature was turned on in the GUI by closing the switch. The primary current
can be measured using a current probe and by using a small loop of wire in place of jumper L3 or C10 on the board.
Figure 23 - Accurate CS1 OCP, 2.5ms debounce time
Green trace: Output voltage (discharged by load after shutdown)
Red and blue trace: PGOOD 1 and 2 signals
Yellow trace: Average Input Current
Rev. 1.3 | Page 17 of 55
PRD1386