Open Collector Interface; Table 1.2.3 Logic Input Timing - IMS MDRIVE 17 Operating Instructions Manual

I n p u t T i m i n g
The direction input and the microstep resolution inputs are internally
synchronized to the positive going edge of the step clock input. When a step
clock pulse goes HIGH, the state of the direction input and microstep
resolution settings are latched. Any changes made to the direction and/or
microstep resolution will occur on the rising edge of the step clock pulse
following this change.
Run and Hold Current changes are updated immediately.
The table below lists the timing specifications.
Minimum Pulse Width
Max. Frequency
I n t e r f a c e O p t i o n s
O p e n C o l l e c t o r I n t e r f a c e
The figure below shows an open collector interface connected to the direction
input (P1:3). This interface method may be used with any of the logic inputs.
Remember that a current limiting resistor must be used in series with the input
if an opto supply voltage greater than +5 volts is used. Refer to next table for
resistor values.
Shown Connected to the Direction Input.
All other Inputs will be interfaced the same.
16
MDrive Logic Input Timing
Specification
Table 1.2.3: Logic Input Timing
Controller
Output
¼ W 1%

OPEN COLLECTOR INTERFACE

Figure 1.2.4: Open Collector Interface
Input
Step Clock
Step Clock
+VDC
Opto Supply P1:1
Direction P1:4
R
LIMIT
W
Time
400 nS
2.0 MHz
PIN 1
OPTO
SPPLY
NC
SCLK
DIR
EN
GND
+V