Smbus; I²C Bus - Congatec conga-QEVAL/Qseven 2.0 User Manual

5.2 Subsystems of QEVAL 2.0
5.2.1

SMBus

The QEVAL 2.0 supports both SMBus and I2C compliant devices. The SMBus signals are available in different locations on the QEVAL 2.0,
including the feature connector (X19) described in section 6.13 of this document.
Use DIP switch SW4 on the QEVAL 2.0 to connect or disconnect SMBus devices that are not compatible with the I2C bus. For example, when
you insert a Qseven
OFF. This setting disconnects the SMBus devices.
DIP Switch SW4 Pin Description
DIP Switch Status
ON
1
OFF
ON
2
OFF
ON
3
OFF
ON
4
OFF
5.2.2 I²C Bus
The I²C signals are available in different locations on the QEVAL 2.0 including the feature connector (X19) described in section 6.13 of this
document. Additionally, the QEVAL 2.0 includes a socket for an I²C EEPROM (U6) that can be used for test purposes during the system
development.
The 8 pin DIP socket can be used with various 2-wire serial EEPROMS such as 24C04/08/16 and can be easily accessed by using the I²C
control commands implemented in the Qseven
for more information.
The address inputs (A0-A2) and write protect (WP) pin of I²C EEPROM can be configured with DIP switch SW1. By default, the DIP switches
are set to ON (LOW state).
Copyright © 2014 congatec AG
module that supports I2C bus on the QEVAL 2.0 instead of the SMBus (e.g conga-QMX6), then set SW4 DIP switches to
®
Description
Connect module's SMB clock signal to PCIe clock buffer
Disconnect module's SMB clock signal from PCIe clock buffer
Connect module's SMB data signal to PCIe clock buffer
Disconnect module's SMB data signal from PCIe clock buffer
Connect module's SMB clock signal to PCIe Slots
Disconnect module's SMB clock signal from PCIe Slots
Connect module's SMB data signal to PCIe clock buffer
Disconnect module's SMB data signal from PCIe clock buffer
EASI API driver. Refer to the Qseven
®
module's user's guide and the EASI programmers guide
®
QEV2m11
SW4
O
1
Default Settings:
N
2
ALL ON
3
4
21/49