Ptx5000 System Architecture Description; Ptx5000 Packet Forwarding Engine Architecture - Juniper PTX5000 Hardware Manual

Packet transport router

Hide thumbs Also See for PTX5000:

Table of Contents

Switch Interface Boards (SIBs)

Control Board CB0 and Routing Engine RE0

PTX5000 System Architecture Description

The PTX5000 has two main architectural components:

• Routing Engine—One or more Routing Engines provide Layer 3 routing services and network

• Packet Forwarding Engines—These high-performance, ASIC-based components provide packet

forwarding, route lookups, and Layer 2 and Layer 3 packet switching. See

Forwarding Engine Architecture" on page 6

The Routing Engines and the Packet Forwarding Engines perform their primary tasks independently, but

communicate through multiple links. This arrangement streamlines forwarding and routing control and

runs Internet-scale backbone networks at high speeds.

The Packet Forwarding Engines provide Layer 2 and Layer 3 packet switching, forwarding, and route

lookup functions.

The Packet Forwarding Engines are implemented in ASICs that are physically located on the FPCs. Each

Packet Forwarding Engine consists of the following components:

• Lookup ASICs, which provide the route lookup function, control functions, Layer 2 and Layer 3

encapsulation and de-encapsulation, and manage the division and reassembly of packets within the

• Queuing and Memory Interface ASICs, which manage the buffering of data cells in memory and the

queueing of notifications.

Chassis grounding points

for more information.

"PTX5000 Packet

Table of Contents