Analog Devices EZ-Board ADSP-BF518F Manual page 99

INDEX
D
Das U-Boot, universal boot loader,
debug agent connector (ZP1),
default configuration, of this EZ-Board,
down signal (CDG), 1-15
DR1PRI signal, 1-20
E
eMMC
interface, 1-12
enable switches (SW20-21), 1-12, 1-14,
Ethernet
interface, xiv, 1-15
connectors (J14-15), 1-16,
isolate mode jumper (JP18), 1-16,
PHY IC (U29), 1-12
power-down mode jumper (JP17), 1-16,
reset push button (SW11),
example programs, 1-24
expansion interface II
J1 connector, 1-20, 1-22, 2-21,
P2 connector, 1-19, 1-20, 1-22,
P3 connector, 1-14, 1-22,
P4 connector, 1-19, 1-20, 1-22,
external memory, 1-9,
F
features, of this EZ-Board,
flag pins, See programmable flags by name (PFx,
PGs, PHx)
flash memory enable switch (SW6),
flash WP jumper (JP3),
G
general-purpose IO pins (GPIO), 1-20, 2-8,
2-10, 2-11, 2-12,
general-purpose push buttons (PB1-2),
GPIO enable switch, See SW2
I-2
1-13
2-24
1-4
2-13
2-22
2-16
2-16
2-11
2-22
2-23
2-23
2-23
1-10
xiii
2-9
2-15
2-19
1-20
ADSP-BF518F EZ-Board Evaluation System Manual
I
installation, of this EZ-Board,
IO voltage, 2-2
J
JTAG
interface, 1-21
connector (P1), 1-6, 1-21,
jumpers
diagram of locations,
JP14 (OTP flag enable),
JP15 (mic select), 1-17,
JP16 (SPI flash CS enable), 1-14,
JP17 Ethernet power-down mode, 1-16,
JP18 Ethernet isolate mode, 1-16,
JP3 (flash WP), 2-15
JP6 (mic select), 1-17
P10 (VDDMEM power), 1-23,
P11 (VDDFLASH power), 1-23,
P8 (VDDINT power), 1-23,
P9 (VDDEXT power), 1-23,
L
land grid array connectors (P5-7), 1-21,
LEDs
diagram of locations,
LED1-3 (PH3, PH5-6), 1-20,
LED13 (power), 2-19
LED4 (USB monitor),
LED9 (reset), 2-19
license restrictions, xii,
M
MAC address, 1-16
media independent interface (MII),
Media Instruction Set Computing (MISC),
memory map, of this EZ-Board,
MICBIAS signal, 2-16
1-4
2-23
2-14
2-15
2-16
2-16
2-16
2-16
2-17
2-17
2-16
2-17
2-24
2-18
2-19
1-6
1-8
1-15
xi
1-9