Summary of Contents for Analog Devices EZ-Board ADSP-BF518F
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ADSP-BF518F EZ-Board Evaluation System Manual Revision 1.1, June 2009 Part Number 82-000217-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106...
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Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use;...
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European EMC directive 2004/108/EC and therefore carries the “CE” mark. The ADSP-BF518F EZ-Board has been appended to Analog Devices, Inc. EMC Technical File (EMC TF) referenced DSPTOOLS1, issue 2 dated June 4, 2008 and was declared CE compliant by an appointed Notified Body (No.0673) as listed below.
What’s New in This Manual ............xvii Technical or Customer Support ............. xvii Supported Processors ..............xviii Product Information ..............xviii Analog Devices Web Site ............xviii VisualDSP++ Online Documentation ........xix Technical Library CD ............... xix Related Documents ..............xx Notation Conventions ..............
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CONTENTS VDDINT Power Jumper (P8) ..........2-16 VDDEXT Power Jumper (P9) ..........2-17 VDDMEM Power Jumper (P10) ........... 2-17 VDDFLASH Power Jumper (P11) ......... 2-17 LEDs ..................2-18 GPIO LEDs (LED1–3) ............2-19 Reset LED (LED9) ............... 2-19 Power LED (LED13) ............2-19 Speed LED (LED14) .............
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CONTENTS ADSP-BF518F EZ-BOARD BILL OF MATERIALS ADSP-BF518F EZ-BOARD SCHEMATIC Title Page ..................B-1 Processor EBIU and Control ............B-2 Processor Power, Bypass Caps ............B-3 External Memory ................. B-4 ADC Inputs ................. B-5 ADC ................... B-6 Audio Codec ................B-7 Ethernet PHY ................
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CONTENTS ADSP-BF518F EZ-Board Evaluation System Manual...
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PREFACE Thank you for purchasing the ADSP-BF518F EZ-Board™, Analog Devices, Inc. evaluation system for ADSP-BF512/BF512F, ADSP-BF514/BF514F, ADSP-BF516/BF516F, and ® ADSP-BF518/BF518F Blackfin processors. Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications applications.
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Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/ The ADSP-BF518F EZ-Board provides example programs to demonstrate the capabilities of the product.
Preface • Push buttons Three push buttons: one reset, two programmable flags with debounce logic • Expansion interface II Next generation of the expansion interface design, provides access to most of the ADSP-BF518F processor signals • Land grid array Easy probing of all port pins and most EBIU signals •...
Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices...
Technical or Customer Support You can reach Analog Devices, Inc. Customer Support in the following ways: • Visit the Embedded Processing and DSP products Web site at http://www.analog.com/processors/technical_support...
This evaluation system supports Analog Devices ADSP-BF512/BF512F, ADSP-BF514/BF514F, ADSP-BF516/BF516F, and ADSP-BF518/BF518F Blackfin embedded processors. Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, , provides information www.analog.com...
Preface VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documenta- tion. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format ( .pdf files for all manuals are provided on the VisualDSP++ installation CD.
Product Information Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata.
Preface Table 2. Related VisualDSP++ Publications (Cont’d) Title Description VisualDSP++ Linker and Utilities Manual Description of the linker function and com- mands. VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function and commands. VisualDSP++ Device Drivers and System Services Description of the device drivers’...
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Notation Conventions Example Description Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...
1 USING ADSP-BF518F EZ-BOARD This chapter provides information to assist you with development of pro- grams for the ADSP-BF518F EZ-Board evaluation system. The following topics are covered. • “Package Contents” on page 1-3 • “Default Configuration” on page 1-4 • “EZ-Board Installation”...
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• “ADC Interface” on page 1-17 • “UART Interface” on page 1-18 • “RTC Interface” on page 1-19 • “LEDs and Push Buttons” on page 1-20 • “JTAG Interface” on page 1-21 • “Land Grid Array” on page 1-21 • “Expansion Interface II”...
• 256 MB SD card • 7-foot Ethernet patch cable • Two 6-foot 3.5 mm male-to-male audio cables If any item is missing, contact the vendor where you purchased your EZ-Board or contact Analog Devices, Inc. ADSP-BF518F EZ-Board Evaluation System Manual...
3 with instructions in this section. There are two options to connect the EZ-Board hardware to a personal computer (PC) running VisualDSP++ 5.0: via an Analog Devices emula- tor or via a standalone debug agent module. The standalone debug agent allows a debug agent to interface to the ADSP-BF518F EZ-Board.
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Using ADSP-BF518F EZ-Board Figure 1-1. Default EZ-Board Hardware Setup ADSP-BF518F EZ-Board Evaluation System Manual...
EZ-Board Session Startup To connect the EZ-Board to a PC via an emulator: 1. Plug the 5V adaptor into connector (labeled 2. Attach the emulator header to connector (labeled ) on the JTAG back side of the EZ-Board. To connect the EZ-Board to a PC via a standalone debug agent: The debug agent can be used only when power is supplied from the wall adaptor.
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Using ADSP-BF518F EZ-Board down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 3. 2. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following.
Evaluation License Restrictions session. Click Next. 6. The Finish page of the wizard appears on the screen. The page dis- plays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-Board.
Using ADSP-BF518F EZ-Board Memory Map The ADSP-BF518F processor has internal static random access memory (SRAM) used for instructions and data storage. See Table 1-1. The inter- nal memory details can be found in the ADSP-BF51x Blackfin Processor Hardware Reference. The ADSP-BF518F EZ-Board includes four types of external memory: synchronous dynamic random access memory (SDRAM), serial peripheral interconnect (SPI) flash, parallel flash, and eMMC.
Using ADSP-BF518F EZ-Board To disable the automatic setting of the SDRAM registers, select Target Options from the Settings menu in VisualDSP++ and uncheck Use XML reset values. For more information on changing the reset values, refer to the online Help. An example program is included in the EZ-Board installation directory to demonstrate how to setup and access the SDRAM interface.
eMMC Interface eMMC Interface The ADSP-BF518F processor is equipped with a removable storage inter- face (RSI), which allows the 2 Gb Micron eMMC flash memory device to be attached gluelessly to the processor. The eMMC interface is attached via the processor’s specific RSI control and data lines. The eMMC inter- face shares pins with the secure digital (SD) interface, push buttons, analog-to-digital converter (ADC) and expansion interface II.
Using ADSP-BF518F EZ-Board SPI Interface The ADSP-BF518F processor has two serial peripheral interface (SPI) ports with multiple chip select lines. The SPI0 port connects directly to serial flash memory and expansion interface II. External serial flash memory is a 16 Mb ST M25P16 device, selected using the line of the processor.
Parallel Peripheral Interface (PPI) SPI flash can be modified. For instructions, refer to the VisualDSP++ online Help, example program included in the EZ-Board installation directory, and U-Boot documentation. U-Boot includes an SPI flash driver and can be used to download a new file over Ethernet or serial con- nection, and write the file to SPI flash.
Using ADSP-BF518F EZ-Board Rotary Encoder Interface The ADSP-BF518F processor has a built-in, up-down counter with sup- port for a rotary encoder. The three-wire rotary encoder interface connects to the thumbwheel rotary switch ( ) and expansion interface II. The SW19 rotary encoder can be turned clockwise for the up function, counter clock- wise for the down function, or can be pushed towards the center of the board to clear the counter.
Audio Interface The PHY can be put into a power-down mode by installing . The JP17 power-down mode should be used whenever the PHY is not used, and the the expansion interface signals are used. See “Ethernet Power Down Jumper (JP17)” on page 2-16 for more information.
Using ADSP-BF518F EZ-Board The control interface of the codec is via a 2-wire interface (TWI). Mic gain values of 14 dB, 0 dB, or –6 dB are selectable through switch For more information, see “MIC Gain/Loopback Switch (SW5)” on page 2-10. Microphone bias is provided through a low-noise reference voltage.
The ADSP-BF518F processor has two built-in universal asynchronous receiver transmitters (UARTs). share the processor’s pins with UART0—1 other peripherals on the EZ-Board. has full RS-232 functionality via the Analog Devices 3.3V UART0 ADM3202 line driver and receiver ( ). When using , do not set...
Using ADSP-BF518F EZ-Board are connected to the expansion interface II connectors. UART0 UART1 For more information, see “Expansion Interface II Connectors (P2 and P4)” on page 2-23. Example programs are included in the EZ-Board installation directory to demonstrate UART and RS-232 operations. For more information on the UART interface, refer to the ADSP-BF51x Blackfin Processor Hardware Reference.
LEDs and Push Buttons LEDs and Push Buttons The EZ-Board provides two push buttons and three LEDs for gen- eral-purpose I/O, as well as two additional push buttons intended for power down and wake functionality, which also can be used as GPIO flag pins.
See “EZ-Board Installation” on page 1-4 for more information. For more information about emulators, contact Analog Devices or go to: http://www.analog.com/processors/blackfin/evaluationDevelop- ment/crosscore/ Land Grid Array The ADSP-BF518F EZ-Board has provisions for probing every port pin and the EBIU interface of the processor on connectors .
Expansion Interface II Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be tested across various hardware plat- forms that have the same expansion interface. The expansion interface II implemented on the ADSP-BF518F EZ-Board consists of four connectors, three of which are 0.1 in.
Using ADSP-BF518F EZ-Board Power Measurements Several locations are provided for measuring the current draw from vari- ous power planes. Precision 0.1 ohm shunt resistors are available on the VDDINT, VDDEXT, VDDMEM, and VDDFLASH voltage domains. For current draw measuments, the associated jumper ( ) must be P8—11 removed.
Example Programs Example Programs Example programs are provided with the ADSP-BF518F EZ-Board to demonstrate various capabilities of the product. The programs are installed with the VisualDSP++ software and can be found in the directory. <install_path>\Blackfin\Examples\ADSP-BF518F EZ-Board Refer to the readme file provided with each example for more information.
2 ADSP-BF518F EZ-BOARD HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-BF518F EZ-Board board. The following topics are covered. • “System Architecture” on page 2-2 Describes the ADSP-BF518F EZ-Board configuration and explains how the board components interface with the processor. •...
This EZ-Board is designed to demonstrate the ADSP-BF518F Blackfin processor capabilities. The processor has an I/O voltage of 3.3V. The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258 digipot, which...
ADSP-BF518F EZ-Board Hardware Reference is configurable over the 2-wire interface (TWI) signals. Refer to the power-on-self test (POST) example in the ADSP-BF518F installation directory of VisualDSP++ for information on how to set up the TWI interface. The core voltage and clock rate can be set on the fly by the processor. The input clock is 25 MHz.
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Programmable Flags Table 2-1. PF Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function Default: ERx- ERXCLK Land grid array, expansion interface II CLK/PPID4/PWM_BL/TACLK1 Default: ERxDV/PPID5/PWM_CH/TACI0 ERXDV Land grid array, expansion interface II Default: COL/PPID6/PWM_CL/TACI1 Land grid array, expansion interface II Default: not used SPI0_SSEL1/PPID7/PWM_SYNC Land grid array, expansion interface II...
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ADSP-BF518F EZ-Board Hardware Reference Table 2-2. PG Port Programmable Flag Connections Processor Pin Other Processor Function EZ-Board Function Default: MIICRS/RMII- MIICRS , land grid array, expansion interface II CRS/HWAIT/SPI1_SSEL3 HWAIT Default: ERxER/DMAR1/PWM_CH ERXER Land grid array, expansion interface II Default: MIITxCLK/RMIIREF_CLK/ MIITXCLK Land grid array, expansion interface II...
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Programmable Flags Table 2-2. PG Port Programmable Flag Connections (Cont’d) Processor Pin Other Processor Function EZ-Board Function Default: PG14 SPI0_MOSI/TMR1/PPIFS2_2/ SPI0_MOSI Land grid array, expansion interface II PWM_TRIPB Default: PG15 SPI0_SSEL2/PPIFS3/AMS[3] AMS3 , land grid array, expansion SPI0_SEL2 interface II Table 2-3.
ADSP-BF518F EZ-Board Hardware Reference Push Button and Switch Settings This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure 2-2. Figure 2-2. Push Button and Switch Locations ADSP-BF518F EZ-Board Evaluation System Manual...
Push Button and Switch Settings Boot Mode Select Switch (SW1) The boot mode select switch ( ) determines the boot mode of the pro- cessor. Table 2-4 shows the available boot mode settings. By default, the ADSP-BF518F processor boots from the on-board parallel flash memory. The selected position of is marked by the notch down the entire rotating portion of the switch, not the small arrow.
Push Button and Switch Settings to configure the inputs for single-ended mode ( ) or differential mode ). When the interface is used on the expansion interface II, set SPORT1 to all is set to all by default. interface is shared with other on-board components, such as SPORT1 the eMMC device and push buttons.
ADSP-BF518F EZ-Board Hardware Reference line of the processor to the signal of the processor. This is UART0_RX required when a POST program is run to test the serial port interface. By default, SW10 Reset Push Button (SW11) The reset push button ( ) resets the following ICs.
Push Button and Switch Settings Rotary Encoder with Momentary Switch (SW14) The rotary encoder ( ) can be turned clockwise for an up count or SW14 counter-clockwise for a down count. The encoder also features a momen- tary switch, activated by pushing the switch towards the processor, which resets the counter to zero.
Block 70 contains 64 KB of configuration data at address range . When the jumper is installed on 0x203 F0000—0x203 FFFFF and the parallel flash driver from Analog Devices is used, block 70 is read-only. By default, is installed. OTP Flag Enable Jumper (JP14)
Jumpers MIC Select Jumper (JP15) The microphone select jumper ( ) connects the signal to the JP15 MICBIAS signal ( on positions 1&2) or connects the signal to MICIN JP15 MICBIAS the 3.5 mm connector on positions 2&3). By default, JP15 JP15 installed on positions 2&3.
ADSP-BF518F EZ-Board Hardware Reference and measure voltage across the 0.1 ohm resistor. Once voltage is measured, power can be calculated. For more information, refer to “Power Measurements” on page 1-23. VDDEXT Power Jumper (P9) The VDDEXT power jumper ( ) is used to measure the processor’s I/O voltage and current.
LEDs LEDs This section describes the on-board LEDs. Figure 2-4 shows the LED locations. Figure 2-4. LED Locations 2-18 ADSP-BF518F EZ-Board Evaluation System Manual...
When is lit, it indicates that the master reset of all major ICs is LED9 active. The reset LED is controlled by the Analog Devices ADM708 supervisory reset circuit. You can assert the reset push button ( ) to SW11 assert a master reset and activate For more information, see “Reset...
Connectors Connectors This section describes connector functionality and provides information about mating connectors. The connector locations are shown in Figure 2-5. Connectors shown with a dotted line are on the backside of the PCB Figure 2-5. Connector Locations 2-20 ADSP-BF518F EZ-Board Evaluation System Manual...
ADSP-BF518F EZ-Board Hardware Reference Expansion Interface II Connector (J1) is a board-to-board connector providing signals from the external bus interface unit (EBIU) of the processor. The connector is located on the left edge of the board. For more information, see “Expansion Interface II”...
Connectors Dual Audio Connectors (J4–5) Part Description Manufacturer Part Number 3.5 mm dual stereo jack SWITCHCRAFT 35RAPC7JS Mating Cable (shipped with the EZ-Board) 3.5 mm male/male 6’ cable RANDOM 10A3-01106 Battery Holder (J12) Part Description Manufacturer Part Number 16 mm battery holder MEMORY PROTECTION BH600 Mating Battery (shipped with the EZ-Board)
ADSP-BF518F EZ-Board Hardware Reference JTAG Connector (P1) The JTAG header is the connecting point for the JTAG interface to the ADSP-BF518F processor. The standalone debug agent requires both con- nectors Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug.
Connectors Part Description Manufacturer Part Number 70-position 0.1”, SMT header SAMTEC TSSH-135-01-L-DV-A Mating Connector 70-position 0.1”, SMT socket SAMTEC SSW-135-22-F-D-VS DMAX Land Grid Array Connectors (P5–7) The land grid array areas ( ) are intended for the probing of the pro- P5—7 cessor signals.
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A ADSP-BF518F EZ-BOARD BILL OF MATERIALS The bill of materials corresponds to “ADSP-BF518F EZ-Board Schematic” on page B-1. Ref. Qty. Description Reference Manufacturer Part Number Designator 74LVC14A 74LVC14AD SOIC14 IDT74FCT3244A IDT74FCT3244APYG PY SSOP20 32.768KHZ EPSON MC-156-32.7680KA-A0: OSC008 ROHS 25MHZ OSC003 EPSON SG-8002CA MP SN74LVC1G08...
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Ref. Qty. Description Reference Manufacturer Part Number Designator BF518 STMICRO M29W320EB70ZE6E M29W320EB "U5" MTFC2GDKDM MICRON MTFC2GDKDM-WT FBGA169 ADM708SARZ ANALOG ADM708SARZ SOIC8 DEVICES ADM3202ARNZ ANALOG ADM3202ARNZ SOIC16 DEVICES ADSP-BF518F ANALOG ADSP-BF518BSWZ-4F4 LQFP176 DEVICES ADP1864AUJZ ANALOG ADP1864AUJZ-R7 SOT23-6 DEVICES ADP1611 ANALOG ADP1611ARMZ-R7 MSOP8 DEVICES ADP1715...
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ADSP-BF518F EZ-Board Bill Of Materials Ref. Qty. Description Reference Manufacturer Part Number Designator ADP1610 ANALOG ADP1610ARMZ-R7 MSOP8 DEVICES DIP3 SWT015 SW19 DIGI-KEY CKN6114-ND DIP8 SWT016 SW20 C&K TDA08H0SB1 DIP6 SWT017 SW15-18,SW22- 218-6LPST DIP4 SWT018 SW3-8,SW10 TDA04HOSB1 SMA XPINS J7,J16-26 JOHNSON 142-0701-201 CON043 COMP...
"MIC GAIN" "LPBK" SW4: MIC GAIN POS. GAIN HP OUT MIC IN 40.2K 0402 5 (14dB) 1 (0dB) 90.9K MICIN RHPOUT_RDIV 0402 DEFAULT 0.5 (-6dB) L_OUT_LPBK L_IN_LPBK 3.3V 3.3V R_OUT_LPBK R_IN_LPBK DIP6 SWT017 FER19 0603 0805 LINE OUT LINE IN 10UF 0.1UF 0.1UF...
3.3V All USB interface circuitry is considered proprietary and has been omitted from this schematic. When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at "ENCODER ENABL" http://www.analog.com R140 R141 R142 511.0 511.0 511.0...
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