Analog Devices ADT7460 Manual page 41

Table 54. Fan Tachometer Limit Registers (Power-On Default = 0xFF)
Register Address
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
Exceeding any of t he TACH
in Inter rup t Statu s R egister 2 to in
Table 55. PWM Configuration Registe
RegisterAddr ess
0x5C
0x5D
0x5E
These registers become read-only when
registers will fail.
Table 56. PWM Con iguration Registe f
Bit Name R/W
<2:0> SPIN Read/Write
<3> SLOW Read /Write
<4> INV Read/Write
<7:5> BHVR Read/Write
R/W
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
limit registe rs by 1 indica tes that the fan is running too slowly or has stalled. The approp ate statu
dicate the fan failure. Setting the Configuration
rs (P we On Defa o r-
R/W
Read/ Write
Read/Write
Read/Write
the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to these
r Bits
Description
These bits control the start-up timeout for PWMx. The PWM output stays high until two valid TACH rising
edges are se n fr e om the fan. If there is not a valid TACH signal during the fan TACH measurement directly
after the fan start-up timeout period, the TACH measurement reads 0xFFFF and Status Register 2 reflects
the fan fault. If the TACH minimum high and low byte contains 0xFFFF or 0x0000, the Status Register 2
bit is not set, even if the fan has not started.
000 = no tar up tim s t-
001 = 10 ms 0
010 = 25 ms defaul 0 (
011 = 40 ms 0
100 = 66 ms 7
101 = 1 s
110 = 2 s
111 = 4 s
SLOW = 1 m kes the ramp ra a
This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for 100% duty
cycle. Setting this bit to 1 inverts the PWM output, so 100% duty cycle corresponds to a logic low output.
These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = Local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs full speed (default).
100 = PWMx is disabled.
101 = Fastest speed calculated by Local and Remote 2 Temperature Control PWMx.
110 = Fastest speed calculated by all three Temperature Channels Control PWMx.
111 = Manual mode. PWM duty cycle registers (Reg. 0x30–0x32) become writable.
Description
TACH1 Minimum Low Byte
TACH1 Minimum High Byte
TACH2 Minimum Low Byte
TACH2 Minimum High Byte
TACH3 Minimum Low Byte
TACH3 Minimum High Byte
TACH4 Minimum Low Byte
TACH4 Minimum High Byte
Register 1 lock bit has no effect on
ult = 0x62)
Descripti on
PWM1 Configuration
PWM2 Configuration
PWM3 Configuration
eout
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tes for acoustic enhancement four times longer.
Rev. C | Page 41 of 52
ADT7460
ri s b it is set
th ese regis ters.