Analog Devices ADT7460 Manual page 23

HIGH LIMIT
TEMPERATURE
"STICKY"
STATUS BIT
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
SMBALERT
INTERRUPT
MASK BIT SET
Figure 36. How Masking the Interrupt Source Affects SMBALERT Output
Masking Interrupt Sources
Interrupt Mask Registers 1 and 2 are located at Addresses 0x74
and 0x75. These allow individual interrupt sources to be masked
out to prevent SMBALERT interrupts. Note that masking an
interrupt source prevents only the SMBALERT output from
being asserted; the appropriate status bit is set as normal.
Table 25. Interrupt Mask Register 1 (Reg. 0x74)
Bit Mnemonic Description
7 OOL 1 masks SMBALERT for any alert condition
flagged in Status Register 2.
6 R2T 1 masks SMBALERT for Remote 2
temperature.
5 LT 1 masks SMBALERT for local temperature.
4 R1T
1 masks SMBALERT for Remote 1
temperature.
3 - Unused
2 VCC 1 masks SMBALERT for the VCC channel.
1 - Unused
0 2.5 V 1 masks SMBALERT for the 2.5 V channel.
Table 26. Interrupt Mask Register 2 (Reg. 0x75)
Bit Mnemonic Description
7 D2 1 masks SMBALERT for Diode 2 errors.
6 D1 1 masks SMBALERT for Diode 1 errors.
5 FAN4 1 masks SMBALERT for Fan 4 failure. If
the TACH4 pin is being used as the
THERM input, this bit masks SMBALERT
for a THERM event.
4 FAN3 1 masks SMBALERT for Fan 3.
3 FAN2 1 masks SMBALERT for Fan 2.
2 FAN1 1 masks SMBALERT for Fan 1.
1 OVT 1 masks SMBALERT for overtemperature
(exceeding THERM limits).
0 - Unused
CLEARED ON READ
(TEMP BELOW LIMIT)
INTERRUPT MASK BIT
CLEARED
(SMBALERT REARMED)
Rev. C | Page 23 of 52
Enabling the SMBALERT Interrupt Output
The SMBALERT interrupt function is disabled by default. Pin 5
or Pin 14 can be reconfigured as an SMBALERT output to signal
out-of-limit conditions.
Table 27. Config Register 4 (Reg. 0x7D)
Pin No. Bit Setting
14 <0> AL2.5V = 1
Table 28. Config Register 3 (Reg. 0x78)
Pin No. Bit Setting
5 <0> ALERT = 1
To Assign THERM Functionality to Pin 9
Pin 9 can be configured as the THERM pin on the ADT7460.
To configure Pin 9 as the THERM pin, set the THERM ENABLE
Bit (Bit 1) in Configuration Reg er 3 (Address 0x78) = 1.
THERM as an Input
When configured as an input, the THERM pin allows the user
to time assertions on the pin. This can be us
to the PROCHOT output of a CPU to gauge system performance.
Fo more information on timing THERM assertions and r
generating SMBALERT s based on THERM , see the Generating
Inter rupts from Events section.
The user can also set up the ADT7460 so when the THER
is dr ven low externally, the fans run at 100%. i
100% while the THERM pin is pulled low.
T is h is done by setting the BOOST bit (Bit 2) in Configurat
Regi ster 3 (Address 0x78) to 1.
alr dy running, for example, in manual mod ea
cu ent duty cycle is above 0x00 or in automatic mode when the rr
te mperature is above T . If the temperature is below T
MIN
the d ty cycle in manual mode is set to 0x00, pulling THERM u
low externally has no effect. See Figure 37 for more information
T
MIN
THERM
THERM ASSERTED TO LOW AS
AN INPUT. FANS DO NOT GO
TO 100% SINCE TEMPERATURE
IS BELOW T .
MIN
Figure 37. Asserting THERM Low as an Input in
Automatic Fan Speed Control Mode
ADT7460
ist
eful for connecting
The fans run at
This works only if the fan is
e when the
MIN
THERM ASSERTED TO LOW AS AN
INPUT. FANS GO TO 100% SINCE
TEMPERATURE IS ABOVE T AND
MIN
FANS ARE ALREADY RUNNING.
pin
M
ion
or if
.