Analog Devices ADT7460 Manual page 39

Table 49. Register 0x40—Configuration Register 1 (Power-On Default = 0x00)
Bit Name R/W
<0> STRT Read/Write
<1> LOCK Write Once
<2> RDY Read-Only
<3> FSPD Read/Write
<4> RES Read-Only
<5> FSPDIS Read /Write
<6> TODIS Read/Write
<7> V Read/Write
CC
Table 50. Register 0x41—Interrupt
Bit Name R/W
<0> 2.5V Read-Only
<1> RES Read-Only
<2> V Read-Only
CC
<3> RES Read-Only
<4> R1T Read-Only
<5> LT Read-Only
<6> R2T Read-Only
<7> OOL Read-Only
Description
L ogic 1 enables monitorin g and PWM control outputs based on the limit settings programmed.
L ogic 0 disables monitoring and PWM control based on the default power-up limit settings. Note that the
l imit values programmed are preserved even if a Logic 0 is written to this b
enabled. This bi t becomes read-only and cannot be changed once Bit 1 (lock bit) has been written. All limit
r egisters should be programmed by BIOS before setting this bit to 1. (Lockable.)
Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable registers become read-
o nly and cannot be modified until the ADT7460 is powered down and powered up again. This prevents
rogue programs such as viruses from modifying critical system limit settings. (Lockable.)
T his bit is set to 1 by the ADT7460 to indicate that the device is fully powered-up and ready to begin syste
m onitoring.
When set to 1, all fans run at full speed. Power-on default = 0. (This bit cannot be locked.)
Reserved for future use.
L ogic 1 disables fan spin-up for two TACH pulses. Instead, the PWM outputs go high for the entire fan s
u p timeout selected.
W hen set to 1, the SMBus timeout feature is disabled. This allows the ADT746
c ontrollers that cannot handle SMBus timeouts. (Lockable.)
When set to 1, the ADT7460 rescales its V
When set to 0, the ADT7460 measures V
Status Regis ter 1 (Power-O
Descr iption
A 1 ind icates that th e 2.5 V high o
register only if the error condition
Reserved for future use.
A 1 indicates that the V high or low limit has been exceeded
CC
register only if the error condition has subsided.
Reserved for future use.
A 1 indicates that the Remote 1 low or high temperature limit has been exceeded. This bit is cleared on a
read of the status register only if the error condition has subsided.
A 1 indicates the local low or high temperature limit has been exceeded. This bit is cleared on a read of the
Status Register only if the error condition has subsided.
A 1 indicatesthat the Remote 2 low or high temperature limit has been exceeded. This bit is cleared on a
re ad of the status registe r only if the err
A 1 indicates t hat an out- of-limit event has been latched in
s tatus bits in S tatus Regis ter 2. Software can test this bit in is
voltage, temperature, or fan speed readings represente
need to read Status Regis ter 2 every interrupt or polling
pin to measure a 5 V supply.
CC
as a 3.3 V supply. (Lockable.)
CC
n Default = 0x00)
r low limit has been exceeded. This bit is cleared on a read of the status
has subsided.
or condition has subsided.
d by Status Register 2 are out-of-limit. This saves the
cycle.
Rev. C | Page 39 of 52
it and the default settings are
0 to be used with SMBus
. This bit is cleared on a read of the status
Status Register 2. This bit is a logical OR of all
olation to determine whether any of the
ADT7460
ms
pin-