Analog Devices ADT7460 Manual page 12

ADT7460
2. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an Acknowledge bit
from the slave device. Transitions on the data line must occ
during the low period of the clock signal and remain stable
during the high period, as a low-to-high transition when the
clock is high may be interpreted as a st
of data bytes that can be transmitted over the serial bus in a
single read or write operation is limited only by what the
master and slave devices can handle.
3. When all data bytes have been read or written, stop conditio
are established. In write mode, the master pulls the data line
high during the 10th clock pulse to assert a stop condition. In
read mode, the master device overrides the acknowledge bit
by pulling the data line high during the low period
ninth clock pulse. This is known as No Acknowledge. The
master then takes the data line low during the low period
before the 10th clock pulse, then high during the 10th clock
pulse to assert a stop condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation because the type of operation is determined at
1
SCL
0
SDA
START BY
MASTER
Figure 18. Writing a Register Address to the Address Pointer Register, Then Writing Data to the Selected Register
op signal. The number
before the
1 0 1 1 A1 A0
FRAME 1
SERIAL BUS ADDRESS
BYTE
SCL (CONTINUED)
SDA (CONTINUED)
the beginning and cannot subsequently be changed without
starting a new operation.
ur
In the case of the ADT7460, write operations contain either one
or two bytes, and read operations contain one byte.
To write data to one of the device data re
from it, the address pointer register must be set so that the
correct data register is addressed. Then data can be written in
that register or read from it. The first byte of a write operation
always contains an address that is stored in the address pointer
ns
register. If data is to be written to the device, the write operation
contains a second data byte that is written to the register
selected by the addres
This is i llustrated in Figure 18. The device address is sent over
the bus followed by R/ W
data bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register.
9 1
D7 D6 D5
R/W
ACK. BY
ADT7460
ADDRESS POINTER REGISTER BYTE
1
D4
D7 D6 D5
FRAME 3
DATA
BYTE
Rev. C | Page 12 of 52
gisters or read data
s pointer register.
being set to 0. This is followed by two
D4 D3 D2 D1 D0
ACK. BY
ADT7460
FRAME 2
9
D3 D2 D1
D0
ACK. BY
ADT7460
9
STOP BY
MASTER