Theory Of Operation; Serial Bus Interface - Analog Devices ADT7460 Manual

THEORY OF OPERATION

SERIAL BUS INTERFACE

Control of the ADT7460 is carried out using the serial System
Management Bus (SMBus). The ADT7460 is connected to this
bus as a slave device, under the control of a master controller.
The ADT7460 has a 7-bit serial bus address. When the device is
powered up with Pin 8 (PWM3/ ADDRESS ENABLE ) high, the
ADT7460 has a default SMBus address of 0101110 or 0x2E. If
more than one ADT7460 is to be used in a system, each ADT7460
should be placed in address select mode by strapping Pin 8 low
on power-up. The logic state of Pin 9 then determines the
device's SMBus address. The logic state of these pins is sampled
on power-up.
The device address is sampled and latched on the first valid
SMBus transaction, more precisely, on the low-to-high
transition at the beginning of the eighth SCL pulse, when the
serial address byte matches the selected slave address. The
selected slave address is chosen using the ADDRESS ENABLE
/ADDRESS SELECT pins. Any attempted changes in the
address has no effect after this.
Table 5. Address Select Mode
Pin 8 State Pin 9 State
0 Low (10 kΩ to GND)
0 High (10 kΩ pull-up)
1 Don't Care
ADT7460
ADDR_SEL
PWM3/ADDR_EN
Figure 14. Default SMBus Address 0x2E
ADT7460
ADDR_SEL
PWM3/ADDR_EN
Figure 15. SMBus Address 0x2C (Pin 9 = 0)
Address
0101100 (0x2C)
0101101 (0x2D)
0101110 (0x2E) (default)
V
CC
9
10k Ω
8
ADDRESS = 0x2E
10k Ω
9
8
ADDRESS = 0x2C
PWM3/ADDR_EN
PWM3/ADDR_EN
CARE SHOULD BE TAKEN TO ENSURE THAT PIN 8
(PWM3/ADDR_EN) IS EITHER TIED HIGH OR LOW. LEAVING PIN 8
FLOATING COULD CAUSE THE ADT7460 TO POWER UP WITH AN
UNEXPECTED ADDRESS.
NOTE THAT IF THE ADT7460 IS PLACED INTO ADDRESS SELECT
MODE, PINS 8 AND 9 CAN BE USED AS THE ALTERNATE FUNC-
TIONS (PWM3, TACH4/THERM) ONLY IF THE CORRECT CIRCUIT IS
MUXED IN AT THE CORRECT TIME.
Figure 17. Unpredictable SMBus Address if Pin 8 is Unconnected
The facility to make hardwired changes to the SMBus slav
addr ess allows the user to avoid conflicts with other devices
shar ing the same serial bus, for example, if more than one
ADT 7460 is used in a system.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a start
condition, defined as a high-to-low transition on the serial
data line SDA while the serial clock line SCL remains high
This indicates that an address/data stream will follow. All
slave peripherals connected to
star condition and shift in the next eight bits, consisting
a 7-bit address (MSB first) plus a R/ W bit, which
determine the direction of the data transfer, that is,
whether data is written to or read from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data line low
during the low period before the ninth clock pulse, known
as the Acknowledge bit. All other devices on the bus no
remain idle while the selected device
read from or written to it. If the R/ W bit is a 0, the master
writes to the slave device. If the R/ W bit is a 1, the master
reads from the slave device.
Rev. C | Page 11 of 52
V
CC
ADT7460
10k Ω
9
ADDR_SEL
8
ADDRESS = 0x2D
Figure 16. SMBus Address 0x2D (Pin 9 = 1)
V
CC
ADT7460
10kΩ
9
ADDR_SEL
8
NC
DO NOT LEAVE ADDR_EN
UNCONNECTED. C
CAUSE UNPREDIC
ADDRESSES
the serial bus respond to the
waits for data to be
ADT7460
AN
TABLE
e
.
of
w