Updated Table Iv - Analog Devices ADT7460 Manual

ADT7460
12V
<1kΩ
R1*
TACH
OUTPUT
Figure 51. Fan with Stro ng TACH Pull-Up to > V
Attenuated with R1/R2
Fan Speed Measure ment
Th e fan count er does n ot count the fan TACH output pulses
directly because the fa n speed may be less than 1000 RPM. It
would take several sec onds to accumulate a reasonably large
and acc urate c ount. In stead, the period of the fan revolution is
measured by gating an on-chip 90 kHz oscillator into the input
of a 16-bit counter for N periods of the fan TACH output
(Figure 52). The accum ulated cou
th e fan tachometer period and inversely proportional to the fan
speed.
CLOCK
PWM
TACH
1
2
3
4
Figure 52 . Fan Speed Meas
N , the number of pulses counted, is determined by the settings
o f Register 0x7B (fan pulses per revolution register). This
register contain s two bits for each fan, allowing one, two
(default), three, or four TACH pulses to be counted.
The fan tachometer readings are 16-bit values consisting of a
2-byte read from the ADT7460.
Table 30. Fan Speed Measurement Registers
Register Description
0x28 TACH1 low byte
0x29 TACH1 high byte
0x2A TACH2 low byte
0x2B TACH2 high byte
0x2C TACH3 low byte
0x2D TACH3 high byte
0x2E TACH4 Low byte
0x2F TACH4 high byte
V
CC
ADT7460
TACH
FAN SPEED
COUNTER
R2*
*SEE TEXT
or Totem-Pole Output,
CC
nt is actually proportional to
urement
Default
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Reading Fan Speed from the ADT7460
If fan speeds are being measured, this involves a 2-register read
fo r each measurement. The low byte should be read first. This
ca uses the high byte to be frozen until both high and low byte
registers are read from. This prevents erroneous TACH readings
The fan tachom
11.11 µs period clocks (9
co unter, om the rising e fr
r ising ed e of the third fa g
p er revo tion are being lu
m easuri ng t he fan TACH
slo wer t he fan is
r eading of 0xFFFF indica
tha t it is unning very slo r
H igh Limit: > Comparison Performed
Since the actual fan TACH period is b
a fan TACH limit by 1 sets the appropriate status bit and can b
used to generate an SMBALERT .
The fan TACH limit registers are 16-bit values consisting of two
bytes.
Table 31. Fan TACH Limit Registers
Register
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
Fan Speed Measurement Rate
The fan TACH readings are normally updated once every
second.
The FAST bit (Bit 3) of Configuration Register 3 (Re
when set, updates the
If any o the fan f
a re inste ad powered dir
b it in Co figuration Re n
r eadings o be taken on t
dir ectly to a dc source.
Rev. C | Page 30 of 52
eter read ing registers report the number of
0 kHz oscill ator) gated to the fan speed
dge of the first fan TACH p
n TACH pulse (assuming two pulses
counted). Since the devi
period, the hi gher the count value the
actually running. A 16- bit fan tachometer
tes either t hat the fan has stalled or
wly (<100 RPM).
eing measured, exceeding
Description
TACH1 minimum low byte
TACH1 minimum high byte
TACH2 minimum low byte
TACH2 minimum high byte
TACH3 inimum low b m yte
TACH3 minimum high byte
TACH4 minimum low byte
TACH4 minimum high byte
fa n TACH readin gs every 250 ms.
s are no t being driven b y a PWM channel but
ectly from 5 V or 12 V, its associated dc
gister 3 should be set. This allows TACH
a continuous b asis for fans connected
.
ulse to the
ce is essentially
e
Defaul t
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
g. 0x78),