Part 18: Dip Switch Configuration; Part 19: Power Supply - Alinx ZYNQ7000 FPGA User Manual

ZYNQ system debugging through the USB cable provided by us.

Part 18: DIP Switch Configuration

The AX7350B FPGA development board has a 2-bit DIP switch SW1 to
configure the ZYNQ system's startup mode. The AX7350B system
development platform supports three boot modes. The three boot modes are
JTAG debug mode, QSPI FLASH and SD card boot mode. After the XC7Z035
chip is powered on, it will detect the level of the corresponding MIO port (MIO5
and MIO4) to determine which startup mode. The user can select different
startup modes through the DIP switch SW1 on the board. The SW1 startup
mode configuration is shown in Table 18-1.
SW1

Part 19: Power Supply

The power input voltage of the development board is DC12V, and the
external +12V power supply supplies power to the board. The +12V input
power supply generates +1.0V ZYNQ core power through the DCDC power
chip MYMGK1R820ERSR. The MYMGK1R820ERSR output current is up to
20A, which is far enough to meet the current demand of the ZYNQ core voltage.
In addition, +12V generates +1.5V through the DC/DC power chip
ETA8156FT2G, and generates other power sources through the DCDC chip
ETA1471FT2G. The VTT and VREF voltages of DDR3 are generated by the
TPS51200 chip.
43 / 46
ZYNQ FPGA Development Board AX7350B User Manual
Switch Position （1， 2）
ON、ON
OFF、OFF
OFF、ON
Table 18-1: SW1 start mode configuration
Amazon Store: https://www.amazon.com/alinx
MIO5,MIO4 Level
0、0
1、1
1、0
Start Mode
JTAG
SD Card
QSPI FLASH