Configure chip pin assignments:
Pin Name
DCLK
nCSO
DATA0
ASDO
Part 6: SDRAM
The AX301 FPGA development board has an SDRAM chip on board,
model: HY57V2562GTR, capacity: 256Mbit (16M * 16bit), 16bit bus. SDRAM
can be used for data buffering. For example, the data collected by the camera
is temporarily stored in SDRAM and then displayed through the VGA interface.
Here SDRAM is used for data caching.
The hardware connection of SDRAM is shown in Figure 6-1
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FPGA Development Board AX301 User Manual
Figure 5-2: SPI Flash on the FPGA Board
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FPGA Pin
H1
D2
H2
C1
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