Alinx ZYNQ7000 FPGA AC7021B User Manual page 7

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SGMII interface
 Two USB2.0 OTG interfaces, each supporting up to 12 nodes
 Two CAN2.0B bus interfaces
 Two SD card, SDIO, MMC compatible controllers
 2 SPIs, 2 UARTs, 2 I2C interfaces
 4 groups of 32bit GPIO, 54 (32+22) as PS system IO, 64 connected to
PL
 High bandwidth connection within PS and PS to PL
The main parameters of the PL logic part are as follows:
 LogicCells: 85K
 Look-up-tables (LUTs):53,200
 Flip-flops:106,400
 18x25MACCs：220;
 BlockRAM：4.9Mb
 Two AD converters for on-chip voltage, temperature sensing and up
to 17 external differential input channels, 1MBPS
XC7Z020-2CLG484I chip speed grade is -2, industrial grade, package is
BGA484, pin pitch is 0.024 inch, the specific chip model definition of ZYNQ7000
series is shown in Figure 2-2
Figure 2-2: The Specific Chip Model Definition of ZYNQ7000 Series
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ZYNQ FPGA Development Board AC7021B User Manual
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