Alinx ZYNQ7000 FPGA AC7021B User Manual page 15

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Figure 6-1: Active crystal oscillator to the PS section
Figure 6-2: 33.333Mhz active Crystal Oscillator on the Core Board
PS Clock pin assignment:
PS_CLK_500
PL system clock source
The AC7021B core board provides a single-ended 50MHz PL system clock
source with 3.3V power supply. The crystal output is connected to the global
clock (MRCC) of the FPGA BANK13, which can be used to drive user logic
within the FPGA. The schematic diagram of the clock source is shown in Figure
6-3:
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ZYNQ FPGA Development Board AC7021B User Manual
Signal Name
Table 6-1: PS Clock pin assignment
Figure 6-3: PL system clock source
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Pin
F7