Ethernet - Renesas RZ/T2M User Manual
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Also See for RZ/T2M:
- Hardware manual (32 pages) ,
- User manual (27 pages) ,
- Startup manual (67 pages)
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5.12
Ethernet
When running any Ethernet software, a unique MAC address should be used. A unique Renesas allocated MAC
address is attached to the PCB as a sticker and should always be used with this device to ensure full compatibility
when using other Renesas hardware on a common Ethernet connection.
Three Ethernet PHY ICs are fitted to the CPU board and are connected to the MPU Ethernet peripherals.
RZ/T2M MPU supports half and full duplex, 10Mb/s and 100Mb/s and 1000Mb/s transmission and reception.
Refer to section 5.4 Ethernet LEDs. The connections for the Ethernet controller are listed in Table 5-15, Table
5-16, Table 5-17, Table 5-18, Table 5-19 below.
Note that Ethernet port 2 cannot be used at the same time as SDRAM.
Ethernet signal
ETH0_TXCLK
ETH0_TXEN
ETH0_TXD0
ETH0_TXD1
ETH0_TXD2
ETH0_TXD3
ETH0_RXCLK
ETH0_RXDV
ETH0_RXD0
ETH0_RXD1
ETH0_RXD2
ETH0_RXD3
ETH0_REFCLK
Ethernet signal
ETH1_TXCLK
ETH1_TXEN
ETH1_TXD0
ETH1_TXD1
ETH1_TXD2
ETH1_TXD3
ETH1_RXCLK
ETH1_RXDV
ETH1_RXD0
ETH1_RXD1
ETH1_RXD2
ETH1_RXD3
ETH1_REFCLK
R20UT4939EG0100 Rev. 1.00
Apr 20, 2022
Table 5-15: Ethernet Connections (ETH0)
Function
RGMII: Transmit clock output
RGMII: Transmit data enable / Transmit data error
RGMII: Transmit data0
RGMII: Transmit data1
RGMII: Transmit data2
RGMII: Transmit data3
RGMII: Receive clock input
RGMII: Receive data valid / Receive data error
RGMII: Receive data0
RGMII: Receive data1
RGMII: Receive data2
RGMII: Receive data3
Outputs 25MHz clock for EtherPHY0
Table 5-16: Ethernet Connections (ETH1)
Function
RGMII: Transmit clock output
RGMII: Transmit data enable / Transmit data error
RGMII: Transmit data0
RGMII: Transmit data1
RGMII: Transmit data2
RGMII: Transmit data3
RGMII: Receive clock input
RGMII: Receive data valid / Receive data error
RGMII: Receive data0
RGMII: Receive data1
RGMII: Receive data2
RGMII: Receive data3
Outputs 25MHz clock for EtherPHY1
5.
User Circuitry
The
MPU
Port
Pin
P09_7
R9
P10_0
W7
P09_6
Y6
P09_5
T9
P09_4
R8
P09_3
W6
P08_6
V7
P08_5
Y3
P10_1
Y7
P10_2
V8
P10_3
V9
P08_4
W4
P09_1
T8
MPU
Port
Pin
P06_4
U1
P06_5
T3
P06_3
P5
P06_2
T2
P05_7
P6
P06_0
T1
P07_3
U3
P07_2
W1
P06_6
U2
P06_7
V1
P07_0
V2
P07_1
R5
P06_1
R3
Page 25 of 87
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