Y1
Appropriate clock dividers for each functional block and a programmable divider to support an output for
switched-mode power supply synchronization are provided. The clock generation for the CS44600 is
shown in the
Figure
XTO
XTI
SYS_CLK
PS_SYNC
DS633F1
L1
C3
rd
Figure 15. 3
Overtone Crystal Configuration
16.
System Clock
Divider
Power Supply
Sync. Divider
Figure 16. CS44600 Internal Clock Generation
C1
C2
PWM Master
Clock Divider
PWM Modulator
Clock Divider
Sample Rate Converter
Clock Divider
CS44600
XTI
XTO
PWM_MCLK
MOD_MCLK
SRC_MCLK
25
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