SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(VD = 2.5 V, VDX = VDP = VLS = 3.3 V; VLC = 2.5 V to 5.0 V; Inputs: Logic 0 = GND, Logic 1 = VLC, C
SCL Clock Frequency
Bus Free Time between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
18. Data must be held for sufficient time to bridge the transition time, t
Stop
Start
SDA
t buf
SCL
14
Parameter
t high
t hdst
t
t
low
hdd
Figure 8. Control Port Timing - I²C Format
Symbol
f
scl
t
buf
t
hdst
t
low
t
high
t
sust
(Note 18)
t
hdd
t
sud
t
r
t
f
t
susp
, of SCL.
f
Repeated
Start
t sud
t sust
Min
Max
-
100
4.7
-
4.0
-
4.7
-
4.0
-
4.7
-
10
-
250
-
-
1000
-
300
4.7
-
t
t f
hdst
t r
CS44600
= 30 pF)
L
Unit
kHz
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
Stop
t susp
DS633F1
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