Cirrus Logic CS44600 Manual page 17

Pin Name Pin #
Power Supply Synchronization Clock (Output) - The PWM synchronized clock to the
PS_SYNC 3
switch mode power supply.
Crystal Oscillator Input (Input) - Crystal Oscillator input or accepts an external clock
XTI 5
input signal that is used to drive the internal PWM core logic.
XTO 6 Crystal Oscillator Output (Output) - Crystal Oscillator output.
External System Clock (Output) - Clock output. This pin provides a divided down clock
SYS_CLK 8
derived from the XTI input.
DAI_MCLK 9 Digital Audio Input Master Clock (Input) - Master audio clock.
Digital Audio Input Serial Clock (Input) - Serial clock for the Digital Audio Input Inter-
DAI_SCLK 10
face. The clock frequency is a multiple of the Left/Right Clock running at Fs.
Digital Audio Input Left/Right Clock (Input) - Determines which channel, Left or Right,
DAI_LRCK 11 is currently active on the serial audio data line. The rate is determined by the sampling fre-
quency Fs.
DAI_SDIN1 12
DAI_SDIN2 13 Digital Audio Input Serial Data (Input) - Input for two's complement serial audio data.
DAI_SDIN3 14
Mute (Input) - The device will perform a hard mute on all channels. All internal registers
MUTE 20
are not reset to their default settings.
Serial Control Port Clock (Input) - Serial clock for the serial control port. Requires an
SCL/CCLK 21 external pull-up resistor to the logic interface voltage in I²C mode as shown in the Typical
Connection Diagram.
Serial Control Data (Input/Output) - SDA is a data I/O line in I²C mode and requires an
SDA/CDOUT 22 external pull-up resistor to the logic interface voltage, as shown in the Typical Connection
Diagram.; CDOUT is the output data line for the control port interface in SPI mode.
Address Bit 1 (I²C)/Serial Control Data (SPI) (Input) - AD1 is a chip address pin in I²C
AD1/CDIN 23
mode.;CDIN is the input data line for the control port interface in SPI mode.
Address Bit 0 (I²C)/Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in
AD0/CS 24
I²C mode; CS is the chip select signal in SPI mode.
Interrupt Request (Output) - CMOS or open-drain interrupt request output. This pin is
INT 25 driven to the configured active state to indicate that the PWM Controller has status data
that should be read by the host.
Reset (Input) - The device enters a low power mode and all internal registers are reset to
RST 26
their default settings when low.
General Purpose Input, Output (Input/Output) - This pin is configured as an input follow-
GPIO6 29 ing a RST condition. It can be configured as a general purpose input or output which can
be individually controlled by the Host Controller.
General Purpose Input, Output (Input/Output) - This pin is configured as an input follow-
GPIO5 30 ing a RST condition. It can be configured as a general purpose input or output which can
be individually controlled by the Host Controller.
General Purpose Input, Output (Input/Output) - This pin is configured as an input follow-
GPIO4 31 ing a RST condition. It can be configured as a general purpose input or output which can
be individually controlled by the Host Controller.
DS633F1
Pin Description
CS44600
17