SWITCHING CHARACTERISTICS - DAI INTERFACE
(VD = 2.5 V, VDX = VDP = VLC = 3.3 V, VLS = 2.5 V to 5.0 V; Inputs: Logic 0 = GND, Logic 1 = VLS.)
RST pin Low Pulse Width
DAI_MCLK Duty Cycle
DAI_SCLK Duty Cycle
DAI_LRCK Duty Cycle
DAI Sample Rate
DAI_SDIN Setup Time Before DAI_SCLK Rising Edge
DAI_SDIN Hold Time After DAI_SCLK Rising Edge
DAI_SCLK High Time
DAI_SCLK Low Time
DAI_LRCK Setup Time Before DAI_SCLK Rising Edge
DAI_SCLK Rising Edge Before DAI_LRCK Edge
15. After powering up, the CS44600, RST should be held low until after the power supplies and clocks are set-
tled.
16. See
Table 1 on page 26
17. Max DAI sample rate is 96 kHz for One Line and TDM modes of operation.
D A I_ L R C K
t
t
lrc k d
D A I_ S C L K
D A I_ S D IN x
Figure 6. Serial Audio Interface Timing
DS633F1
Parameters
for suggested MCLK frequencies.
t
t
lrcks
s ck h
sc k l
t
t
d h
d s
Symbol
(Note 15)
(Note 16)
(Note 17)
F
s
t
ds
t
dh
t
sckh
t
sckl
t
lrcks
t
lrckd
DAI_LRCK
(input)
t
t
lrcks
lrckd
DAI_SCLK
(input)
DAI_SDIN1
Figure 7. Serial Audio Interface Timing - TDM Mode
CS44600
Min
Max
Units
1
-
40
60
45
55
45
55
32
192
kHz
10
-
10
-
20
-
20
-
25
-
25
-
t
t
t
lrcks
sckh
sckl
t
t
ds
dh
MSB
ms
%
%
%
ns
ns
ns
ns
ns
ns
MSB-1
13
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