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Cirrus Logic CRYSTAL LAN CS890 Technical Reference Manual

Ethernet controller
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CS8900
Ethernet Controller
Technical Reference Manual
Version: 1.31
AN83REV1
September 10, 1996
Copyright © Crystal Semiconductor Corporation, 1996
(All Rights Reserved)
To obtain technical application support, call (800) 888-5016 (from the US and Canada) or
512-442-7555 (from outside the US and Canada), and ask for CS8900 Application Support,
or send an email to: ethernet@crystal.cirrus.com

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  • Page 1 CS8900 Ethernet Controller Technical Reference Manual Version: 1.31 AN83REV1 September 10, 1996 Copyright © Crystal Semiconductor Corporation, 1996 (All Rights Reserved) To obtain technical application support, call (800) 888-5016 (from the US and Canada) or 512-442-7555 (from outside the US and Canada), and ask for CS8900 Application Support, or send an email to: ethernet@crystal.cirrus.com...
  • Page 2 CS8900 Technical Reference Manual The information contained in this document is subject to change without notice. Crystal Semiconductor Corpora- tion makes no warranty of any kind with regard to this material including, but not limited to, the implied warran- ties of merchant ability and fitness for a particular purpose. Crystal Semiconductor Corporation shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, perform- ance, or use of this material.

  • Page 3: Table Of Contents

    CS8900 Technical Reference Manual TABLE OF CONTENTS CRYSTAL LAN™ CS8900 ETHERNET CONTROLLER TECHNICAL REFERENCE MANUAL ..........................1 1.0 INTRODUCTION TO CS8900 TECHNICAL REFERENCE MANUAL .....6 2.0 HARDWARE DESIGN .....................9 2.1 E ....9 THERNET ARDWARE ESIGN FOR MBEDDED YSTEMS AND OTHERBOARDS 2.1.1 General Description .....................9 2.1.2 Board Design Considerations ..................9 2.1.2.1 Crystal Oscillator..............................
  • Page 4 CS8900 Technical Reference Manual 2.4.4 Routing of the analog signals ..................45 2.5 R CS8900 ..............47 ECOMMENDED AGNETICS FOR THE 3.0 JUMPERLESS DESIGN ....................50 3.1 S EEPROM........................ 50 ERIAL 3.1.1 Reset Configuration Block ..................50 3.1.2 Driver Configuration Information ................51 3.1.3 Format of Driver Configuration Block ...............
  • Page 5 CS8900 Technical Reference Manual 5.3.1 Address Generation .....................74 5.3.2 Read and write signals ....................75 5.3.3 SBHE* signal ......................75 5.3.4 Other control signals ....................75 5.3.5 Status signals from CS8900 ..................75 5.4 D (SD[0:15]) C ..................75 ATABUS ONNECTION 5.5 C CS8900............76 HECKLIST FOR SIGNAL CONNECTIONS TO THE 5.6 I EEPROM ?.....................76...

  • Page 6: Manual

    CS8900 Technical Reference Manual Addison-Wesley, 1993, ISBN 0-201- 1.0 Introduction to CS8900 Techni- 62405-2 cal Reference Manual c) Netware Training Guide: Networking Technologies, by Debra Niedenmiller- This Technical Reference Manual provides Chaffis, New Riders Publishing, ISBN the information which will be helpful in 1-56205-363-9 designing a board using the CS8900, pro- gramming the associated EEPROM, and...
  • Page 7 CS8900 Technical Reference Manual The hardware design considerations for Crystal’s Software Driver ( 5‚‰ƒ„ev both motherboards and adapter cards are Distribution Policy is as follows. The discussed in Chapter 2.0. The EEPROM CS8900 developer kit contains a single- programming considerations are described user copy of object code which is available in Chapter 3.0.
  • Page 8 CS8900 Technical Reference Manual Driver Operating System Network Operation System DOS ODI 4.x Client DOS 6.2 to 3.3, Novell 4.X, 3.X Win 3.1, Windows for Workgroups 3.11 OS/2 ODI 4.x Client OS/2 2.2, 2.1, Warp Novell 4.X, 3.X ODI 4.x Server Novell 4.X, 3.X NDIS 2.x - DOS DOS 6.2 to 3.3...

  • Page 9: Hardware Design

    CS8900 Technical Reference Manual 2.0 Hardware Design 2.1.2 Board Design Considerations This section give design guidance for both 2.1.2.1 Crystal Oscillator embedded and adapter card designs, includ- ing recommendations for dealing with the The CS8900, in this reference design, uses upper ISA address lines (LA[20:23]), a 20.000 MHz crystal oscillator.

  • Page 10: Eeprom

    CS8900 Technical Reference Manual That is, it resides in the lower 1 Mega bytes 2.1.2.5 LEDs of address space. Many embedded systems do not require To use the CS8900 in extended memory LEDs for the Ethernet traffic. Therefore address space requires an external address this reference design does not implement decoder.

  • Page 11: Logic Schematics

    CS8900 Technical Reference Manual to provide very clean and adequate +5 V 2.1.3 Logic Schematics and ground connections to the CS8900. Figures 2.1.2 and 2.2.5 detail the logic schematics for the various circuits used in 2.1.5 Bill of Material the reference design. Table 2.1 has a list components that are typically used to assemble this adapter 2.1.4 Component Placement and Signal...
  • Page 12 CS8900 Technical Reference Manual Figure 2.1.1a. Placement of Components, Top Side AN83REV1...
  • Page 13 CS8900 Technical Reference Manual Figure 2.1.1b. Placement of Components, Solder Side AN83REV1...
  • Page 14 CS8900 Technical Reference Manual 0.1 µ F EE_CLK 1K_EEPROM_S 4.99k, 1% XTAL XTL1 20.0 MHz XTL2 EECS ISA0 EEDATAOUT SA00 ISA1 SA01 ISA2 SA02 LED0/HC0 ISA3 SA03 ISA4 BSTATUS / HC1 SA04 LED2 ISA5 SA05 ISA6 SA06 ISA7 SA07 ISA8 SA08 ISA9 SA09...
  • Page 15 CS8900 Technical Reference Manual TANT TANT TANT 22 µ F 22 µ F 22 µ F Figure 2.1.3. Decoupling Capacitors Schematic 10BT_RD- CON_RJ458PSHLD 10BT_RD- 100Ω 0.1µF 10BT_RD+ 10BT_RD+ 24.3Ω 10BT_TD- 1:1.41 24.3Ω 68pF 10BT_TD+ 0.1µF 10BT_XFR_S 1 kV 1 kV 0.01µF 0.01µF Figure 2.1.4.

  • Page 16: Low Cost Ethernet Combo Card Reference Design: Crd8900

    CS8900 Technical Reference Manual circuitry is internal to the CS8900. Please 2.2 Low Cost Ethernet Combo Card note that the crystal must be placed very Reference Design: CRD8900 close to XTL1 and XTL2 pins of the CS8900. This section describes the hardware design of a low-cost, two-layer, full-featured Eth- 2.2.2.2 ISA Bus Interface ernet solution intended for use in PC ISA-...

  • Page 17: Socket For Optional Boot Prom

    CS8900 Technical Reference Manual The last few bytes of the EEPROM are ters that hold the Boot PROM base address used to store information about the hard- (PacketPage base + 030h) and the Boot ware configuration and software require- PROM address mask (PacketPage base + ments.

  • Page 18: Leds

    CS8900 Technical Reference Manual This isolation transformer has three wind- 2.2.2.6 LEDs ings for three pairs of differential AUI sig- nals: transmit, receive and collision. All A pair of LEDs are provided in the refer- three windings have a turns ratio of 1:1 ence design to indicate link OK and line between the primary and secondary wind- active status.

  • Page 19: Logic Schematics

    CS8900 Technical Reference Manual be built with a “high” enable DC-DC con- 2.2.4 Component Placement and Rout- verter. In such a case, software that con- ing of Signals trols the enable and disable operations of the DC-DC converter should be modified. Figure 2.2.1 shows the component place- ment used for the reference design.
  • Page 20 CS8900 Technical Reference Manual Boot PROM Option Item Reference # Description Quantity Vendor Part Number C2, C4 Capacitor, 0.1 uF, SMT0805, X7R Resistor, 4.7K, 5%, 1/8W, SMT0805 32K X 8 EPROM Socket Octal Transceiver 74LS245 (SOIC) AUI Option Item Reference # Description Quantity Vendor Part Number...
  • Page 21 CS8900 Technical Reference Manual Figure 2.2.1. Placement of Components AN83REV1...
  • Page 22 CS8900 Technical Reference Manual 0.1 µ F EE_CLK ELCS 1K_EEPROM_S 4.99k BSTATUS / HC1 33pF 33pF XTAL 20.0 MHz XTL1 XTL2 LED_T EECS ISA0 SA00 EEDATAOUT ISA1 SA01 ISA2 SA02 LED0/HC0 99 LED_B ISA3 SA03 BSTATUS / HC1 ISA4 SA04 LED2 ISA5 SA05...
  • Page 23 CS8900 Technical Reference Manual TANT TANT TANT 22 µ F 22 µ F 22 µ F Figure 2.2.3. Power Supply Decoupling Schematic PROM_CS 0.1µF 0.1µF 4.7k SA00 SA01 SA02 SA03 SA04 SA05 SA06 SA07 SA08 SA09 SA10 SA11 SA12 SA13 SA14 27C256 74LS245...
  • Page 24 CS8900 Technical Reference Manual +12V VP_+12V 0.1 µ F CON_AUI15PSUBO 39.2 39.2 CI_B CI_A DO_A DO_B DI_B DI_A 39.2 Ω R9 39.2 AUI_XFR_S 0.1 µ F 0.1 µ F Figure 2.2.6. AUI Schematic +12IN1 ISOLATED_GND SOUT+ +12V +12IN2 SOUT- 0.1 µ F 0.1 µ...
  • Page 25 CS8900 Technical Reference Manual (CS8900 Pin 4) EE_SK I/00 I/01 (CS8900 Pin2) ELCS I/02 CHIPSEL_B (CS8900 Pin7) CS8900 Pin5) EEDOUT I/03 (ISA B28) BALE (ISA C02) LA23 (ISA C03) LA22 (ISA C04) LA21 (ISA C05) LA20 (ISA B02) RESET PAL16R4 Figure 2.2.8 PAL Decode of LA[20-23] AN83REV1...
  • Page 26 CS8900 Technical Reference Manual Figure 2.2.9. CRD8900 Top-Side Routing AN83REV1...
  • Page 27 CS8900 Technical Reference Manual Figure 2.2.10. CRD8900 Bottom Side Routing AN83REV1...

  • Page 28: Addressing The Cs8900: I/Omode , Memory Mode

    CS8900 Technical Reference Manual Addressing the CS8900: I/O 2.3.2 Memory mode mode, Memory mode In the memory mode, there are two options where the CS8900 can be placed in the ISA The CS8900, integrated Ethernet controller, memory address map, lower memory has 20 address pins that directly connect to (below 1 Meg) or extended memory (above SA[19:0] of the ISA bus.

  • Page 29: Extended Memory Mode

    CS8900 Technical Reference Manual SMEMWR* signals become active only for by the serial input via the inputs EESK the lower 1 Meg of the ISA address space. (clock), ELCS* (enable pin) and EEDa- The CHIPSEL* pin of the CS8900 should taOut (serial data out).
  • Page 30 CS8900 Technical Reference Manual writes to PacketPage base address + 040h remains asserted until ALE becomes active to program values for Q[23:20], the and the LA[23:20] do not match with CS8900 then shifts that data serially in to Q[23:20]. The internal decoder of the GAL.
  • Page 31 CS8900 Technical Reference Manual ;PALASM Design Description ;---------------------------------- Declaration Segment ------------ TITLE High address decoder PATTERN REVISION AUTHOR Deva Bodas COMPANY Crystal Semiconductor DATE 04/01/1994 CHIP _decoder PAL16R4 ;--------------------------------- PIN Decl a rations --------------- PIN 1 SCLK ; Serial clock from the CS8900 pin 4 (EESK) PIN 2 CS_EL_b ;...
  • Page 32 CS8900 Technical Reference Manual ;----------------------------------- Boolean Equation Segment ------ EQUATIONS ; Serial shift register When CS_EL_b is inactive (1), no change When CS_EL_b is active (0), shift in data Q20 := (Q20 * CS_EL_b) + (/CS_EL_b * SDATA) Q21 := (Q21 * CS_EL_b) + (/CS_EL_b * Q20) Q22 := (Q22 * CS_EL_b) + (/CS_EL_b * Q21) Q23 := (Q23 * CS_EL_b) + (/CS_EL_b * Q22) ;...

  • Page 33: Layout Considerations For The Cs8900

    CS8900 Technical Reference Manual 2.4.1 General guidelines Layout considerations for the Figure 2.4.1 shows component placement CS8900 for an ISA COMBO Ethernet adapter card using a CS8900. The placement of the The CS8900 is a mixed signal device hav- CS8900 should be such that the routes of ing digital and analog circuits for an Ether- the analog signals and the digital signals net communication.
  • Page 34 CS8900 Technical Reference Manual Figure 2.4.1. General placement on an ISA adapter card AN83REV1...

  • Page 35: Two Layered Printed Circuit Board (Pcb)

    CS8900 Technical Reference Manual quired when the component and trace 2.4.2.1 Two layered printed circuit density is high. Often discrete components board (PCB) like resistors and capacitors are placed on the solder side of a printed circuit board. A two layered PCB has signal traces on the component and solder side of the PCB.
  • Page 36 CS8900 Technical Reference Manual Figure 2.4.2. Ground connection. Top layer of two-layer Combo Card AN83REV1...
  • Page 37 CS8900 Technical Reference Manual Figure 2.4.3. Power (Vcc) Connection. Bottom layer of two-layer Board AN83REV1...
  • Page 38 CS8900 Technical Reference Manual Figure 2.4.4. Placement of Components, Top Side AN83REV1...
  • Page 39 CS8900 Technical Reference Manual Figure 2.4.5. Placement of Components, Solder Side AN83REV1...
  • Page 40 CS8900 Technical Reference Manual Figure 2.4.6. Component (top) side of four-layer board AN83REV1...
  • Page 41 CS8900 Technical Reference Manual Figure 2.4.7. +5V Plane of four-layer board AN83REV1...
  • Page 42 CS8900 Technical Reference Manual Figure 2.4.8. Ground Plane of four-layer board AN83REV1...
  • Page 43 CS8900 Technical Reference Manual Figure 2.4.9. Solder side (bottom) of four-layer board AN83REV1...
  • Page 44 CS8900 Technical Reference Manual Figure 2.4.10. Placement of Decoupling Capacitor (Bottom side, under CS8900) Figure 2.4.11. Routing of Decoupling C apacitor (Top side, component side) AN83REV1...

  • Page 45: Routing Of The Digital Signals

    CS8900 Technical Reference Manual as possible to the RJ-45 connector. Both 2.4.3 Routing of the digital signals transmit and receive signal traces should be routed so they are parallel and of equal Most of the digital signals from the length. The signal traces should be on the CS8900 go to the ISA bus connector.
  • Page 46 CS8900 Technical Reference Manual Figure 2.4.12. 10BASE-T Transit Figure 2.4.13. 10BASE-T Receive Layout Details Layout Details AN83REV1...

  • Page 47: Recommended Magnetics For The Cs8900

    CS8900 Technical Reference Manual 2.5 Recommended Magnetics for the CS8900 For the 10BASE-T interface, choice be- tween isolation transformer and isolation The CS8900 is has two types of Ethernet transformer with a common mode choke interfaces 10BASE-T and AUI. For both (CMC) depends on the common mode the interfaces, analog filters are on the chip.
  • Page 48 CS8900 Technical Reference Manual Vendor name Description Through-hole Surface- mount Isolation transformer, 100 µH Halo Electronics TD01-1006K TG01-1006N Isolation transformer, 100 µH Pulse Engineering PE-64503 PE-65728 Isolation transformer, 100 µH Valor Electronics LT6033 ST7033 Table 2.5.1. Partial List of Reco mmended AUI Transformers Vendor name Description Through-hole...
  • Page 49 CS8900 Technical Reference Manual Company and Address Telephone Halo Electronics, Inc. (415)-568-5800 (415)-568-6161 Redwood City, CA 94063 Pulse Engineering (619)-674-8100 (619)-674-8262 PO Box 12235 San Diego, CA 92112 Valor Electronics (619)-537-2500 (619)-537-2525 9715 Business Park Avenue, San Diego, CA 92131 Table 2.5.3.

  • Page 50: Jumperless Design

    CS8900 Technical Reference Manual approximately 25 µsec. per word, the 3.0 Jumperless Design length of the Reset Configuration Block should be kept to a minimum. Using the CS8900, both add-in adapters and motherboard solutions can be imple- The MAC drivers provided by Crystal will mented without hardware jumpers or retain much of the adapter’s configuration switches.

  • Page 51: Driver Configuration Information

    CS8900 Technical Reference Manual 3.1.2 Driver Configuration Information The CS8900 supports random access to 16- bit words in the through software control. Therefore, in addtion to the configruation data stored in the Reset Configuration Block automatically loaded by the CS8900 after each reset, additional configuration information can be stored in the EEPROM and accessed by the MAC driver.
  • Page 52 CS8900 Technical Reference Manual Addr. Description Bit(s) Function IA bits[39-32], bits[47-40] 15-0 IEEE individual node address IA bits[ 23-16], bits[31-24] 15-0 IEEE individual node address IA bits[ 7-0], bits[15-8] 15-0 IEEE individual node address ISA Configuration Flags Memory Mode Flag 0 = memory mode disabled, 1 = memory mode enabled Boot PROM Flag 0 = no Boot PROM , 1= Boot PROM installed...
  • Page 53 CS8900 Technical Reference Manual Addr. Description Bit(s) Function Adapter Configuration (Continued) Optimization Flags 12-11 00 = Server, 01 = DOS Client, 10 = Multi-OS Client Reserved 10-8 Reserved for future use, set to 0 DC/DC Converter Polarity 0 = Low enable, 1 = High enable Media Type in Use 0 = Auto Detect, 1 = 10Base-T, 2 = AUI, 3 = 10Base-2 LA Decode Circuitry...

  • Page 54: Ieee Physical Address

    CS8900 Technical Reference Manual Bit 12: DMA Burst 3.1.3.1 IEEE Physical Address Refer to Section 4.4.3 BusCTL Register of the CS8900 Data Sheet for a discussion of DMA Burst The format of the 48-bit IEEE physical ad- control. Default is enabled. dress as expected by the MAC driver is il- lustrated by the following example.

  • Page 55: Packetpage Memory Base

    CS8900 Technical Reference Manual CASE 1. (IMM = 0, media autodetect selected, cable not connected) 3.1.3.3 PacketPage Memory Base Driver disables TX/RX and unloads if d y- Bits 15-4: 12 MSB of Memory Base Address namic load/unload is supported by OS. The twelve most significant bits of the 24-bit address CASE 2.

  • Page 56: Eeprom Revision

    CS8900 Technical Reference Manual Specifies the presence of LA decode circuitry on the Seven bits for a range of 00 to 99 decimal. A roll- adapter. Refer to Section 2.3.2.2. (Must be initial- over to 00 will be interpreted as the year 2000. ized by OEM before shipping adapter.) Bits 8-5: Month Bit 3: Adapter Provides HW Standby Circuitry...

  • Page 57: Serial Number

    CS8900 Technical Reference Manual High Word ter installation through the CS8900’s serial interface. Section 3.5 of the CS8900 Data These 16 bits make up the OEM’s product ID No. Sheet details the procedure for programming an EEPROM via the CS8900’s serial inter- The upper order 11 bits are the product ID number and the lower order 5 bits are the revision number.

  • Page 58: Driver Interface With Bios-Based Configuration

    CS8900 Technical Reference Manual 1.) The base of the data structure must be verify the data in the block is valid using a marked by a header consisting of the 8-byte checksum. ASCII text string “$CS8900$”. The checksum stored at the end of the 2.) The header must be located on a 512- block is the 2’s complement of the 16-bit sum of all the words in the Driver Configu-...
  • Page 59 CS8900 Technical Reference Manual Byte Offset Description Function Header 8 bytes = “$CS89XX$” Individual Address IEEE individual address. Same format as word 1Ch in Table 3.2 Individual Address IEEE individual address. Same format as word 1Dh in Table 3.2 Individual Address IEEE individual address.

  • Page 60: Obtaining Ieee Addresses

    CS8900 Technical Reference Manual The remaining 24 bits of the address are 3.3 Obtaining IEEE Addresses assigned by the manufacturer. For fur- ther information and an application for an OUI, please contact the IEEE at the Each node of a Local Area Network has following address: a unique address for the media access control (MAC).

  • Page 61: Device Drivers And Setup/Installation Software

    CS8900 Technical Reference Manual 4.0 Device Drivers and Additionally Crystal provides two utility Setup/Installation Software programs: This chapter discusses the software a) DOS Setup and Installation Utility provided by Crystal for use with the b) EEPROM Programming Utility, for CS8900. That software includes a broad use in OEM manufacturing environ- family of device drivers, driver-related ments.
  • Page 62 CS8900 Technical Reference Manual non-UNIX operating system environ- Note that in some cases the same driver ments. The directory structure of this may appear in more than one location on floppy is shown in Figure 4.2.1. the floppy. This occurs to insure that naming convention is of the format: the file load for each OS or NOS can be EXXXXYYY.ZZZ, where:...
  • Page 63 CS8900 Technical Reference Manual root:\ SETUP.EXE SETUP.RES DOS4GW.EXE ARTISOFT\ 4.X\ ENDS2ISA.EXE {NDIS 2 DOS driver} PROTOCOL.INI README.TXT 5.X\ ENDS2ISA.EXE {NDIS 2 DOS driver} README.TXT BOOTPROM\ EODINDIS.ROM {Boot PROM for ODI and NDIS} README.TXT LANSRVR\ ENDS2ISA.OS2 {NDIS 2 OS/2 driver} ENDS2ISA.NIF PROTOCOL.INI README.TXT MSLANMAN.DOS\...
  • Page 64 CS8900 Technical Reference Manual root:\ {continued from previous page} NETWARE\ CLIENT\ DOSODI\ EODIISA.COM {ODI DOS driver} EODIISA.HDI EODIISA.INS IO.CLI MEM.CLI NET.CFG README.TXT OS2ODI\ EODIISA.OLI EODIISA.PRO EODIISA.SYS {ODI OS/2 driver} EODIISA.TXT README.TXT SERVER\ NW3.12\ EODIISA.HDI EODIISA.LAN {ODI Server driver} EODIISA.LDI EODIISA.MSG IO.SRV MEM.SRV README.TXT...
  • Page 65 CS8900 Technical Reference Manual root:\ {continued from previous page} PCNFS\ ENDS2ISA.DOS {NDIS 2 DOS driver} ENDS2ISA.NIF PROTOCOL.INI README.TXT PKTDRVR\ EPKTISA.COM {Packet driver} README.TXT WFW3.1\ ENDS2ISA.DOS {NDIS 2 DOS driver} OEMSETUP.INF README.TXT WFW3.11\ ENDS3ISA.386 ENDS3ISA.DOS {NDIS 3 DOS driver} EODIISA.ODI OEMSETUP.INF README.TXT WINNT\ DISK1...

  • Page 66: Dos Setup And Installation Utility

    CS8900 Technical Reference Manual The utility implements the following al- DOS Setup and Installation gorithm: Utility Scan ISA bus for card with CS8900 IF card present THEN The DOS Setup and Installation Utility BEGIN allows you to install a driver (in a non If EEPROM not found THEN UNIX machine), and to configure a BEGIN...

  • Page 67: Adapter/Auto Configuration Screen

    CS8900 Technical Reference Manual 5) Use the Adapter/Manual configura- 4.3.1.2 Adapter/Manual Configura- tion options to manually override any of tion Screen the recommended configurations setting shown by the Auto Configuration This function allows the user to manu- screen. See section 4.3.1.2 for more de- ally assign system resources and other tails.

  • Page 68: Diagnostics/Self Test Screen

    CS8900 Technical Reference Manual NOTE: If memory mode is selected, setup should be manually made if the then the user must manually exclude diagnostics fail. use of that block by the system. This Failure upon test items such as I/O, IRQ, is accomplished by editing the DMA, and MEM indicate the conflict CONFIG.SYS file.

  • Page 69: Driver/Install Screen

    CS8900 Technical Reference Manual • The Internal Loop Back test insures dress, the user will need to manually edit the NET.CFG file in the destination di- that the card is operating properly. If rectory. For example, the frame type is this test fails, make sure the card is selected by including only one of the properly attached to the network...
  • Page 70 CS8900 Technical Reference Manual This test requires that each of two sta- loop that keeps feeding frames to the tions have a CS8900 card installed and network and at the same time receiving have Diagnostics/Network Test program frames back from the responder. The running.

  • Page 71: Cs8900: Low Cost, High Performance Ethernet Controller For Non-Isa Systems

    CS8900 Technical Reference Manual edges causes major problem during 5.0 CS8900: Low cost, high per- EMC tests, such as FCC Part 15 class formance Ethernet Controller (B) or CISPR class (B). The 10BASE-T for non-ISA systems signals driven out of the CS8900 are in- ternally filtered with a 5th order Butter- The CS8900 includes a direct interface worth filter and the signals lack fast...

  • Page 72: Cs8900 In Memory Mode

    CS8900 Technical Reference Manual In an IO mode, the CS8900 uses 16 tions. A DMA-mode receive operation bytes of IO address space. The address can be selected by setting either map for this mode is described in table RxDMAOnly (bit 9) or AutoRxDMA 4.5 in the CS8900 datasheet.

  • Page 73: Selection Of Io, Memory And Dma Modes

    CS8900 Technical Reference Manual active as long as the CS8900 contains The memory mode is the most direct and completely received. If ‘n’ words are to efficient mode of operation for the be transferred from the CS8900 to the CS8900. In the memory mode the system RAM, the DRQ signal remains CS8900 occupies 4K of the address...

  • Page 74: Design Example : Cs8900 Interface To Mc68302

    CS8900 Technical Reference Manual CS8900 MC68302 SBHE* UDS*/A0 A[1:11] SA [1:11] SA12 74F32 SA[13:19] CS1* CS1* 74F32 MEMW* R/W* R/W* IOW* 74F04 MEMR* Interrupt 74F32 IOR* Controller 74F04 74F32 INT* INTRQ0 Figure 5.1 Connection of CS8900 to MC68302 ter and the CS1 option register. For ex- 5.3 Design example: CS8900 inter- ample, if the CS1 base address register face to MC68302...

  • Page 75: Read And Write Signals

    CS8900 Technical Reference Manual MC68302 generates address 5.3.4 Other control signals 0D01400h, the address seen by the CS8900 will be 01400h with one of its All other control signals can be tied memory commands (MEMR* HIGH or LOW. The signal REFRESH*, MEMW*) active.

  • Page 76: Checklist For Signal Connections To The Cs8900

    CS8900 Technical Reference Manual all the register and bit definitions in the one more alternative for the SBHE* CS8900 are also byte swapped. Infor- connection. For a memory mode opera- mation that is normally appears at bits tion, if a CHIPSEL* pin is controlled by [0:7] will now appear on bits [8:15], and an external chip select, the CHIPSEL* information that usually appears on bits...

  • Page 77: Summary

    CS8900 Technical Reference Manual Crystal Semiconductor will provide sup- 5.7 Summary port for non-ISA designs, including logic schematic review and layout re- view for design engineers. Those re- The CS8900 can be interfaced to most views help prevent logic errors, and help non-ISA system with very minimum or minimize emissions.

  • Page 78: Contacting Customer Support At Crystal

    CS8900 Technical Reference Manual 6.0 Contacting Customer Sup- 2. Dial (512) 441-3265. port at Crystal 3. Type <RETURN> after connection is made. Crystal Semiconductor is committed to providing the industry’s most easily 4. Enter your assigned username at the implemented Ethernet solution. prompt.

  • Page 79: Index

    CS8900 Technical Reference Manual 7.0 Index —1— —E— 10BASE-2, 9, 10, 16, 18, 19, 24, 68 EEPROM, 6, 7, 10, 11, 16, 17, 19, 28, 29, 50, 51, 52, 10BASE-T, 9, 10, 15, 16, 18, 19, 23, 45, 46, 47, 48, 53, 57, 58, 61, 66, 67, 68, 73, 76 serial, 31, 32, 50 EISA Product Identification Code, 56, 57...
  • Page 80 CS8900 Technical Reference Manual Novell, 8, 61, 69 SCO UNIX, 8, 61, 62 signals AEN, 71, 72 —O— ALE, 30, 31, 32 CHIPSEL*, 28, 29, 31, 72, 76 ODI, 8, 55, 61, 62, 63, 64, 65 CSOUT*, 17 OEM, 54, 55, 56, 57, 61 DMACK*, 72 OS/2, 8, 61, 62, 63, 64 DRQx, 72...

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