62
REGISTER
BIT
ADDRESS
R8
7
MODE_GPIO
GPIO
control
Table 54 Mode is GPIO Control
Auto-incremental writes are supported in 2 wire and 3 wire modes. This is enabled by default.
REGISTER
BIT
ADDRESS
R9
1
AUTOINC
Control
Interface
Table 55 Control Interface
3-WIRE SERIAL CONTROL MODE
In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on
CSB/GPIO latches in a complete control word consisting of the last 16 bits.
CSB
SCLK
SDIN
B23
B22
B21
B20
control register address
Figure 34 3-Wire Serial Control Interface
READBACK IN 3-WIRE MODE
The following two timing diagrams are also supported.
Figure 35 Alternative 3-Wire Serial Control Timing
LABEL
DEFAULT
0
Selects MODE as a GPIO pin
0 = MODE is an input. MODE selects 2-
wire mode when low and 3-wire mode
when high.
1 = MODE can be an input or output
under the control of the GPIO control
register. Interface operates in 3-wire mode
regardless of what happens on the MODE
pin.
LABEL
DEFAULT
1
Auto-Incremental write enable
0=Auto-Incremental writes disabled
1=Auto-Incremental writes enabled
B19
B18
B17
B16
B15
B14
B13
WM8940
DESCRIPTION
DESCRIPTION
latch
B4
B3
B2
B1
B0
control register data bits
Rev 4.4
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