Control Interface Timing - 2-Wire Mode - Cirrus Logic WM8940 Manual

CONTROL INTERFACE TIMING – 2-WIRE MODE
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=SPKVDD=3.3V, DGND=AGND=SPKGND=0V, T
256fs, 24-bit data, unless otherwise stated.
PARAMETER
Program Register Input Information
SCLK Frequency
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
Pulse width of spikes that will be suppressed
18
t
3
SDIN
t
6
SCLK
t
1
Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
t
5
t
4
t
2
t
7
t
9
o
= +25 C, Slave Mode, fs = 48kHz, MCLK =
A
SYMBOL MIN
0
t 1.3
1
t 600
2
t 600
3
t 600
4
t 100
5
t
6
t
7
t 600
8
t
9
t 0
ps
WM8940
t
3
t
8
TYP MAX UNIT
526 kHz
us
ns
ns
ns
ns
300 ns
300 ns
ns
900 ns
5 ns
Rev 4.4