INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC)
Rev 4.4
The actual register values can be determined from the coefficients as follows:
13
NFn_A0 = -a0 x 2
12
NFn_A1 = -a1 x 2
To configure Notch Filter 3 as a 1
coefficients as follows:
=
a
0
0
tan(
w
/
) 2
=
c
a
1
tan(
w
/
) 2
c
Where:
=
w
2
f
/
f
c
c
s
f
= cutoff frequency in Hz, f
c
The actual register values can be determined from the coefficients as follows:
NF3_A0 = 0
12
NF3_A1 = -a
x2
1
DIGITAL ADC VOLUME CONTROL
The output of the ADCs can be digitally attenuated over a range from –127dB to 0dB in 0.5dB steps.
The gain for a given eight-bit code X is given by:
Gain = 0.5 x (x–255) dB for 1 x 255, MUTE for x = 0
REGISTER
BIT
LABEL
ADDRESS
R15
7:0
ADCVOL
ADC Digital
[7:0]
Volume
Table 19 ADC Volume
The WM8940 has an automatic PGA gain control circuit, which can function as an input peak limiter or
as an automatic level control (ALC).
The Automatic Level Control (ALC) provides continuous adjustment of the input PGA in response to
the amplitude of the input signal. A digital peak detector monitors the input signal amplitude and
compares it to a register defined threshold level (ALCLVL).
If the signal is below the threshold, the ALC will increase the gain of the PGA at a rate set by
ALCDCY. If the signal is above the threshold, the ALC will reduce the gain of the PGA at a rate set by
ALCATK.
st
order low pass filter, set the NF3_LP bit to 1 and calculate the
−
1
+
1
= sample frequency in Hz
s
DEFAULT
11111111
ADC Digital Volume Control
( 0dB )
0000 0000 = Digital Mute
0000 0001 = -127dB
0000 0010 = -126.5dB
... 0.5dB steps up to
1111 1111 = 0dB
WM8940
DESCRIPTION
29
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