HP 1660E Series Service Manual page 126

Logic analyzers
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Testing Performance
Performance Test Record (logic analyzer)
Performance Test Record (continued)
Test
Settings
Results
Single-Clock,
Disable pulse generator, channell CDMP (LED off)
Multiple-Edge
Pass/Fail
Acquisition
All Pods, Channel 3 Setup/Hold Time
4.0/0.0 ns
J!
Kt
U
Mt
Nt
P!
Setup/Hold Time
0.0/4.0 ns
Jt
Kt
U
Mt
Nt
Pt
All Pods, Channel
Setup/Hold Time
4.0/0.0 ns
J!
11
Kt
Lt
Mt
- - -
Nt
pt
Setup/Hold Time
0.0/4.0 ns
J!
Kt
Lt
- - -
Mt
- - -
Nt
P!
Time Interval
Pass/Fail
Accuracy
min X-O
47.50 fls
maxX-O
47.50 fls
avg X-O
47.50 fls
3-100

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