Figure 9-10. Il/Fext Plot; Figure 9-11. Tdr Plot; Figure 9-12. Hdmi Via Topology - Nvidia Jetson Orin NX Design Manual

Parameter
Connector voiding
General: See Chapter 17 for guidelines related to Serpentine routing, routing over voids and noise coupling
Notes:
1. Longer trace lengths may be possible if the total trace loss is equal to or better than the target. If the loss is greater, the max
trace lengths will need to be reduced.
2. The average of the differential signals is used for length matching.
3. Do not perform length matching within breakout region. Recommend doing trace length matching to <1ps before vias or any
discontinuity to minimize common mode conversion
4. If routing includes a flex or 2nd PCB, the max trace delay and skew calculations must include all the PCBs/flex routing.
Solutions with flex/2nd PCB may not achieve maximum frequency operation.
The following figures show the HDMI interface signal routing requirements.
Figure 9-10. IL/FEXT Plot
Figure 9-11. TDR Plot
Figure 9-12. HDMI Via Topology
PRELIMINARY INFORMATION
NVIDIA Jetson Orin NX
Requirement Units
Voiding the ground below the signal
lanes 0.1448 (5.7 mil) larger than the
pin itself
Notes
See Figure 9-24
DG-10931-001_v0.1 | 50
Display