Pcie; Table 7-8. Orin Usb 3.2 Signal Connections - Nvidia Jetson Orin NX Design Manual

Table 7-8. Orin USB 3.2 Signal Connections
Module Pin Name
USBSS_TX_N/P (USB 3.2 Port #0)
DP0_TXD1_N/P (USB 3.2 Port #1)
DP0_TXD3_N/P (USB 3.2 Port #2)
USBSS_RX_N/P (USB 3.2 Port #0)
DP0_TXD0_N/P (USB 3.2 Port #1)
DP0_TXD2_N/P (USB 3.2 Port #2)
7.2

PCIe

Jetson Orin NX brings four PCIe interfaces to the module pins for up to seven total lanes (1 x4
+ 1 x1 + 1x2) for use on the carrier board. The PCIe x4 interface (PCIE0) operates up to Gen4
speed and supports both Root Port and Endpoint operation. The PCIe x1 interface (PCIE1)
operates up to Gen4 speed and support only Root Port operation. The PCIe x2 interface (PCIE2)
can also be broken into two x1 interfaces (PCIE2 x1 and PCIE3 x1). PCIE2 and PCIE3 operate
up to Gen4 speed and support only Root Port operation. Figure 7-9 shows all possible
interfaces as Root Ports. Figure 7-10 shows the x4 interfaces as an Endpoint. Lane reversal
and polarity inversion (P/N swapping) is supported per controller.
PRELIMINARY INFORMATION
NVIDIA Jetson Orin NX
Type Termination
DIFF Out Series 0.1uF caps. ESD
Protection near connector if
required.
DIFF In If routed directly to a
peripheral on the board, AC
caps are needed for the
peripheral TX lines. ESD
protection near connector if
required.
USB and PCIe
Description
USB 3.2 Differential
Transmit Data Pairs:
Connect to USB 3.2
connectors, hubs, or other
devices on the PCB.
USB 3.2 Differential Receive
Data Pairs: Connect to USB
3.2 connectors, hubs, or
other devices on the PCB.
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