Rx3I Cpu Settings; Lan Interface Status Bits - Emerson PACSystems RX3i User Manual

User Manual
GFK-2949E
The Emerson provided examples use variable mode on the EIS001 module to identify the
terminals and prevent un-intended overlap using symbolic variables.
3.3

RX3i CPU settings

EIS001 modules require some amount of background scan time to efficiently transfer point
data to and from the RX3i CPU. The minimum 5ms setting needs to be set in the Background
Window Timer parameter in the CPU Scan tab of the hardware configuration screen for the
CPU. More background scan time may be needed if multiple EIS001 modules are used.
Figure 7: CPU Configuration Showing Example of Scan Settings (Scan Tab)
3.4

LAN Interface Status Bits

There are 80 LAN Status bits; the EIS001 module will typically use two of the LSI bits to
control parameterization, as follows:
a. The EIS001 will signal that it is ready to accept parameterization by asserting Bit 11.
b. The CPU should typically not communicate with the EIS001 until such time as Bit 13
Note:
Configuration
and
has been asserted.
Should there be a failure of the EIS001 during parameterization, these bits may remain in a
1 or 0 state.
Chapter 3
Dec 2020
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