Dpr - Quectel RM502Q-GL Hardware Design

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The module operation status indicated by WAKE_ON_WAN# is shown as below.

Table 24: State of WAKE_ON_WAN#

WAKE_ON_WAN# State

Output a one-second pulse signal at low level

Always at high voltage level

Host

NOTE:

The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23.

4.5.5. DPR*

RM502Q-GL provides a DPR (Dynamic Power Reduction) pin for body SAR (Specific Absorption Rate)

detection. The signal is sent from the proximity sensor of a host system to RM502Q-GL module to provide

an input trigger, which will reduce the output power in radio transmission.

Table 25: Function of the DPR Signal

DPR Level

High/Floating

Low

NOTE

See document [4] for more details about the command AT+QCFG="sarcfg".

RM502Q-GL_Hardware_Design

VCC_IO_HOST

10k

GPIO

Figure 26: WAKE_ON_WAN# Signal Reference Circuit

Function

NO max. transmitting power backoff

Max. transmitting power backoff by AT+QCFG="sarcfg"

Module Operation Status

Call/SMS/Data is incoming (to wake up the host)

Idle/Sleep

WAKE_ON_WAN#

Wake up the host

5G Module Series

RM502Q-GL Hardware Design

Module

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