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NOTE
"*" means under development.
3.9.2. WLAN Debug Interface
The following table shows the pin definition of WLAN debug interface. Connect this interface to the test points in
your application.
Table 12: Pin Definition of WLAN Debug Interface
Pin Name
WLAN_DBG_TXD
WLAN_DBG_RXD
3.9.3. BT Debug Interface
The following table shows the pin definition of BT debug interface. Connect this interface to the test points in
your application.
Table 13: Pin Definition of BT Debug interface
Pin Name
Pin No.
BT_DBG_TXD
23
BT_DBG_RXD
22
3.10. RF Antenna Interfaces
The following table shows the pin definition of RF antenna interfaces.
FG50V_Hardware_Design
Pin No.
I/O
Description
21
DO
WLAN debug UART transmit
65
DI
WLAN debug UART receive
I/O
Description
DO
BT debug UART transmit
DI
BT debug UART receive
Wi-Fi&BT Module Series
FG50V Hardware Design
Comment
1.8 V power domain.
If unused, keep these pins
open.
Comment
1.8 V power domain.
If unused, keep these pins
open.
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