UART 1 Transmit Pin
UART1 TX
UART 1 Receive Pin
UART1 RX
GPIO Bits 0 to 3
GPIO-[0:3]
Please reference our
values.
I2C Clock Signal
I2C CLK
I2C Data Signal
I2C SDA
System Recovery Pin
RECOVERY
RTC Battery Input
RTC BAT INPUT
External Reset Button Source
RESET
Document: CTIM-00471
Revision: 0.14
TX2/TX2i/TX1 Module
-
This is level shifted on the Orbitty carrier
to support 3.3V logic.
-
Under L4T this port will show up as
/dev/ttyS0
-
This signal is the UART channel 1 output
from the TX2/TX2i/TX1 Module
-
This is level shifted on the Orbitty carrier
to support 3.3V logic.
-
Under L4T this port will show up as
/dev/ttyTHS2
-
This signal is the UART channel 1 input on
TX2/TX2i/TX1 Module
-
This is level shifted on the Orbitty carrier
to support 3.3V logic.
-
Under L4T this port will show up as
/dev/ttyTHS2
-
This signal is the GPIO Bit 0 and can be
configured as an Input or an Output
-
This is level shifted on the Orbitty carrier
to support 3.3V logic.
GPIO KDB
-
This is clock signal on the I2C bus
-
This signal has a pull up on the
TX2/TX2i/TX1 module to +3.3V
-
Under L4T this is I2C bus # 1
-
This is data signal on the I2C bus
-
This signal has a pull up on the
TX2/TX2i/TX1 module to +3.3V
-
Under L4T this is I2C bus # 1
-
Shorting this signal to Ground will
initialize a system recovery procedure
-
Use this pin to connect a backup battery
source (Coin Cell or other) to sustain the
RTC clock on the TX2/TX2i/TX1 module.
-
The voltage should be provided from a 3V
source
Page 13 of 31
Orbitty Carrier for NVIDIA® Jetson™ TX2/TX2i
Output
3.3V CMOS
Input
3.3V CMOS
Input/Output
Configurable
3.3V CMOS
for TX2/TX2i/TX1
Output
+3.3V
Open Drain
Bidirectional
+3.3V
Open Drain
Input
Input
Input
Users Guide
www.connecttech.com
5
6
7,8,9,10
11
12
13
14
15
Date: 2021-10-05
Need help?
Do you have a question about the NVIDIA Jetson TX2 and is the answer not in the manual?