Quectel RM510Q-GL Hardware Design page 35

5g module series
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Please note that triggering the RESET# signal will lead to loss of all data in the modem and removal of
system drivers. It will also disconnect the modem from the network.
Table 12: Definition of RESET# Pin
Pin No.
Pin Name
67
RESET#
The module can be reset by pulling down the RESET# pin for 250–600 ms. An open collector/drain driver
or a button can be used to control the RESET# pin.
Host
Figure 12: Reference Circuit of RESET# with NPN Driving Circuit
RM510Q-GL_Hardware_Design
I/O
Description
Reset the module
DI, PU
Active LOW.
Reset pulse
GPIO
R2
1k
S1
TVS
C1
33 pF
250-600 ms
NOTE: The capacitor C1 is recommended to be less than 47 pF.
Figure 13: Reference Circuit of RESET# with a Button
DC Characteristics
V
max = 1.575 V
IH
V
min = 1.25 V
IH
V
max = 0.45 V
IL
RESET#
Q1
NPN
R3
250-600 ms
100k
Module
VDD 1.5V
R1
100k
RESET#
67
5G Module Series
RM510Q-GL Hardware Design
Comment
Internally pulled up to
1.5 V with a 100 kΩ
resistor
Module
VDD 1.5V
R1
100k
67
PMIC
PMIC
34 / 87

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