User I/O Connector - VersaLogic BayCat VL-EPM-31ECP Hardware Reference Manual

U I/O C
SER ONNECTOR
Figure 31 shows the location and pin orientation of the user I/O connector.
EPM-31 Hardware Reference Manual
Figure 28. Location and Pin Orientation of the User I/O Connector
Table 19: User I/O Connector Pinout
Pin Signal
1 +5 V
3 USB1_P
5 USB1_N
7 +5V
9 USB3_P
11 USB3_N
13 +3.3 V
15 SPKR#
17 PWR_BTN#
19 GND
21 I2C Clock
23 I2C Data
25 GND
27 FPGA GPIO1
29 FPGA GPIO3
31 GND
33 FPGA GPIO5
35 FPGA GPIO7
37 +3.3 V
39 ETH0 LED
CBR-4005B Paddleboard
Pin Signal
2 GND
4 USB2_P
6 USB2_N
8 GND
10 USB4_P
12 USB4_N
14 GND
16 PLED#
18 RST_BTN#
20 GND
22 V_BATT
24 V_BATT_RETURN
26 GND
28 FPGA GPIO2
30 FPGA GPIO4
32 GND
34 FPGA GPIO6
36 FPGA GPIO8
38 GND
40 ETH1 LED
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